<def f='src/src/sys/external/bsd/drm2/dist/drm/radeon/atombios.h' l='4116' ll='4129'/>
<size>1</size>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/radeon/atombios.h' l='4111'>//for DVI/HDMI, in dual link case, both links have to have same mapping. 
//Bit[1:0]: Define which pin connect to DVI connector data Lane2, =0: source from GPU pin TX0, =1: from GPU pin TX1, =2: from GPU pin TX2, =3 from GPU pin TX3
//Bit[3:2]: Define which pin connect to DVI connector data Lane1, =0: source from GPU pin TX0, =1: from GPU pin TX1, =2: from GPU pin TX2, =3 from GPU pin TX3
//Bit[5:4]: Define which pin connect to DVI connector data Lane0, =0: source from GPU pin TX0, =1: from GPU pin TX1, =2: from GPU pin TX2, =3 from GPU pin TX3
//Bit[7:6]: Define which pin connect to DVI connector clock lane, =0: source from GPU pin TX0, =1: from GPU pin TX1, =2: from GPU pin TX2, =3 from GPU pin TX3</doc>
<mbr r='_ATOM_DVI_CONN_CHANNEL_MAPPING::ucDVI_DATA2_Source' o='0' t='UCHAR'/>
<mbr r='_ATOM_DVI_CONN_CHANNEL_MAPPING::ucDVI_DATA1_Source' o='2' t='UCHAR'/>
<mbr r='_ATOM_DVI_CONN_CHANNEL_MAPPING::ucDVI_DATA0_Source' o='4' t='UCHAR'/>
<mbr r='_ATOM_DVI_CONN_CHANNEL_MAPPING::ucDVI_CLK_Source' o='6' t='UCHAR'/>
