<dec f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212.h' l='536' type='HAL_BOOL ar5212ChipReset(struct ath_hal * ah, HAL_CHANNEL * )'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_attach.c' l='354' u='c' c='ar5212Attach'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_reset.c' l='255' u='c' c='ar5212Reset'/>
<def f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_reset.c' l='862' ll='968' type='HAL_BOOL ar5212ChipReset(struct ath_hal * ah, HAL_CHANNEL * chan)'/>
<doc f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_reset.c' l='855'>/*
 * Places the hardware into reset and then pulls it out of reset
 *
 * TODO: Only write the PLL if we&apos;re changing to or from CCK mode
 * 
 * WARNING: The order of the PLL and mode registers must be correct.
 */</doc>
