<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nv50.h' l='21' type='const struct nv50_disp_mthd_chan *'/>
<offset>64</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_gm107.c' l='103' u='w'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='1105' u='r' c='nv50_disp_intr_error'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='1682' u='w'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv84.c' l='286' u='w'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv94.c' l='146' u='w'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nva0.c' l='148' u='w'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nva3.c' l='120' u='w'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nvd0.c' l='1265' u='r' c='nvd0_disp_intr_error'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nvd0.c' l='1378' u='w'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nve0.c' l='268' u='w'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nvf0.c' l='103' u='w'/>
