<def f='src/src/sys/external/bsd/drm2/dist/drm/radeon/radeon.h' l='967' ll='985'/>
<size>112</size>
<mbr r='radeon_rlc::save_restore_obj' o='0' t='struct radeon_bo *'/>
<mbr r='radeon_rlc::save_restore_gpu_addr' o='64' t='__uint64_t'/>
<mbr r='radeon_rlc::sr_ptr' o='128' t='volatile __uint32_t *'/>
<mbr r='radeon_rlc::reg_list' o='192' t='const u32 *'/>
<mbr r='radeon_rlc::reg_list_size' o='256' t='u32'/>
<mbr r='radeon_rlc::clear_state_obj' o='320' t='struct radeon_bo *'/>
<mbr r='radeon_rlc::clear_state_gpu_addr' o='384' t='__uint64_t'/>
<mbr r='radeon_rlc::cs_ptr' o='448' t='volatile __uint32_t *'/>
<mbr r='radeon_rlc::cs_data' o='512' t='const struct cs_section_def *'/>
<mbr r='radeon_rlc::clear_state_size' o='576' t='u32'/>
<mbr r='radeon_rlc::cp_table_obj' o='640' t='struct radeon_bo *'/>
<mbr r='radeon_rlc::cp_table_gpu_addr' o='704' t='__uint64_t'/>
<mbr r='radeon_rlc::cp_table_ptr' o='768' t='volatile __uint32_t *'/>
<mbr r='radeon_rlc::cp_table_size' o='832' t='u32'/>
