<dec f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='2831' type='int sandybridge_pcode_write(struct drm_i915_private * dev_priv, u8 mbox, u32 val)'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='3610' u='c' c='hsw_enable_ips'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='3640' u='c' c='hsw_disable_ips'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6992' u='c' c='hsw_disable_lcpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='7051' u='c' c='hsw_restore_lcpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3480' u='c' c='gen6_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3506' u='c' c='gen6_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3585' u='c' c='gen6_update_ring_freq'/>
<def f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='6208' ll='6229' type='int sandybridge_pcode_write(struct drm_i915_private * dev_priv, u8 mbox, u32 val)'/>
