require '_h2ph_pre.ph';

unless(defined(&__HIFN_H__)) {
    eval 'sub __HIFN_H__ () {1;}' unless defined(&__HIFN_H__);
    require 'machine/endian.ph';
    eval 'sub HIFN_BAR0 () {( &PCI_MAPREG_START + 0);}' unless defined(&HIFN_BAR0);
    eval 'sub HIFN_BAR1 () {( &PCI_MAPREG_START + 4);}' unless defined(&HIFN_BAR1);
    eval 'sub HIFN_D_CMD_RSIZE () {24;}' unless defined(&HIFN_D_CMD_RSIZE);
    eval 'sub HIFN_D_SRC_RSIZE () {80;}' unless defined(&HIFN_D_SRC_RSIZE);
    eval 'sub HIFN_D_DST_RSIZE () {80;}' unless defined(&HIFN_D_DST_RSIZE);
    eval 'sub HIFN_D_RES_RSIZE () {24;}' unless defined(&HIFN_D_RES_RSIZE);
    eval 'sub HIFN_MAX_COMMAND () {(8+ 8+ 8+ 64+ 8+ 24);}' unless defined(&HIFN_MAX_COMMAND);
    eval 'sub HIFN_MAX_RESULT () {(8+ 4+ 20+ 4);}' unless defined(&HIFN_MAX_RESULT);
    eval 'sub HIFN_D_LENGTH () {0x0000ffff;}' unless defined(&HIFN_D_LENGTH);
    eval 'sub HIFN_D_MASKDONEIRQ () {0x02000000;}' unless defined(&HIFN_D_MASKDONEIRQ);
    eval 'sub HIFN_D_DESTOVER () {0x04000000;}' unless defined(&HIFN_D_DESTOVER);
    eval 'sub HIFN_D_OVER () {0x08000000;}' unless defined(&HIFN_D_OVER);
    eval 'sub HIFN_D_LAST () {0x20000000;}' unless defined(&HIFN_D_LAST);
    eval 'sub HIFN_D_JUMP () {0x40000000;}' unless defined(&HIFN_D_JUMP);
    eval 'sub HIFN_D_VALID () {0x80000000;}' unless defined(&HIFN_D_VALID);
    eval 'sub HIFN_0_PUDATA () {0x00;}' unless defined(&HIFN_0_PUDATA);
    eval 'sub HIFN_0_PUCTRL () {0x04;}' unless defined(&HIFN_0_PUCTRL);
    eval 'sub HIFN_0_PUISR () {0x08;}' unless defined(&HIFN_0_PUISR);
    eval 'sub HIFN_0_PUCNFG () {0x0c;}' unless defined(&HIFN_0_PUCNFG);
    eval 'sub HIFN_0_PUIER () {0x10;}' unless defined(&HIFN_0_PUIER);
    eval 'sub HIFN_0_PUSTAT () {0x14;}' unless defined(&HIFN_0_PUSTAT);
    eval 'sub HIFN_0_FIFOSTAT () {0x18;}' unless defined(&HIFN_0_FIFOSTAT);
    eval 'sub HIFN_0_FIFOCNFG () {0x1c;}' unless defined(&HIFN_0_FIFOCNFG);
    eval 'sub HIFN_0_SPACESIZE () {0x20;}' unless defined(&HIFN_0_SPACESIZE);
    eval 'sub HIFN_PUCTRL_CLRSRCFIFO () {0x0010;}' unless defined(&HIFN_PUCTRL_CLRSRCFIFO);
    eval 'sub HIFN_PUCTRL_STOP () {0x0008;}' unless defined(&HIFN_PUCTRL_STOP);
    eval 'sub HIFN_PUCTRL_LOCKRAM () {0x0004;}' unless defined(&HIFN_PUCTRL_LOCKRAM);
    eval 'sub HIFN_PUCTRL_DMAENA () {0x0002;}' unless defined(&HIFN_PUCTRL_DMAENA);
    eval 'sub HIFN_PUCTRL_RESET () {0x0001;}' unless defined(&HIFN_PUCTRL_RESET);
    eval 'sub HIFN_PUISR_CMDINVAL () {0x8000;}' unless defined(&HIFN_PUISR_CMDINVAL);
    eval 'sub HIFN_PUISR_DATAERR () {0x4000;}' unless defined(&HIFN_PUISR_DATAERR);
    eval 'sub HIFN_PUISR_SRCFIFO () {0x2000;}' unless defined(&HIFN_PUISR_SRCFIFO);
    eval 'sub HIFN_PUISR_DSTFIFO () {0x1000;}' unless defined(&HIFN_PUISR_DSTFIFO);
    eval 'sub HIFN_PUISR_DSTOVER () {0x0200;}' unless defined(&HIFN_PUISR_DSTOVER);
    eval 'sub HIFN_PUISR_SRCCMD () {0x0080;}' unless defined(&HIFN_PUISR_SRCCMD);
    eval 'sub HIFN_PUISR_SRCCTX () {0x0040;}' unless defined(&HIFN_PUISR_SRCCTX);
    eval 'sub HIFN_PUISR_SRCDATA () {0x0020;}' unless defined(&HIFN_PUISR_SRCDATA);
    eval 'sub HIFN_PUISR_DSTDATA () {0x0010;}' unless defined(&HIFN_PUISR_DSTDATA);
    eval 'sub HIFN_PUISR_DSTRESULT () {0x0004;}' unless defined(&HIFN_PUISR_DSTRESULT);
    eval 'sub HIFN_PUCNFG_DRAMMASK () {0xe000;}' unless defined(&HIFN_PUCNFG_DRAMMASK);
    eval 'sub HIFN_PUCNFG_DSZ_256K () {0x0000;}' unless defined(&HIFN_PUCNFG_DSZ_256K);
    eval 'sub HIFN_PUCNFG_DSZ_512K () {0x2000;}' unless defined(&HIFN_PUCNFG_DSZ_512K);
    eval 'sub HIFN_PUCNFG_DSZ_1M () {0x4000;}' unless defined(&HIFN_PUCNFG_DSZ_1M);
    eval 'sub HIFN_PUCNFG_DSZ_2M () {0x6000;}' unless defined(&HIFN_PUCNFG_DSZ_2M);
    eval 'sub HIFN_PUCNFG_DSZ_4M () {0x8000;}' unless defined(&HIFN_PUCNFG_DSZ_4M);
    eval 'sub HIFN_PUCNFG_DSZ_8M () {0xa000;}' unless defined(&HIFN_PUCNFG_DSZ_8M);
    eval 'sub HIFN_PUNCFG_DSZ_16M () {0xc000;}' unless defined(&HIFN_PUNCFG_DSZ_16M);
    eval 'sub HIFN_PUCNFG_DSZ_32M () {0xe000;}' unless defined(&HIFN_PUCNFG_DSZ_32M);
    eval 'sub HIFN_PUCNFG_DRAMREFRESH () {0x1800;}' unless defined(&HIFN_PUCNFG_DRAMREFRESH);
    eval 'sub HIFN_PUCNFG_DRFR_512 () {0x0000;}' unless defined(&HIFN_PUCNFG_DRFR_512);
    eval 'sub HIFN_PUCNFG_DRFR_256 () {0x0800;}' unless defined(&HIFN_PUCNFG_DRFR_256);
    eval 'sub HIFN_PUCNFG_DRFR_128 () {0x1000;}' unless defined(&HIFN_PUCNFG_DRFR_128);
    eval 'sub HIFN_PUCNFG_TCALLPHASES () {0x0200;}' unless defined(&HIFN_PUCNFG_TCALLPHASES);
    eval 'sub HIFN_PUCNFG_TCDRVTOTEM () {0x0100;}' unless defined(&HIFN_PUCNFG_TCDRVTOTEM);
    eval 'sub HIFN_PUCNFG_BIGENDIAN () {0x0080;}' unless defined(&HIFN_PUCNFG_BIGENDIAN);
    eval 'sub HIFN_PUCNFG_BUS32 () {0x0040;}' unless defined(&HIFN_PUCNFG_BUS32);
    eval 'sub HIFN_PUCNFG_BUS16 () {0x0000;}' unless defined(&HIFN_PUCNFG_BUS16);
    eval 'sub HIFN_PUCNFG_CHIPID () {0x0020;}' unless defined(&HIFN_PUCNFG_CHIPID);
    eval 'sub HIFN_PUCNFG_DRAM () {0x0010;}' unless defined(&HIFN_PUCNFG_DRAM);
    eval 'sub HIFN_PUCNFG_SRAM () {0x0000;}' unless defined(&HIFN_PUCNFG_SRAM);
    eval 'sub HIFN_PUCNFG_COMPSING () {0x0004;}' unless defined(&HIFN_PUCNFG_COMPSING);
    eval 'sub HIFN_PUCNFG_ENCCNFG () {0x0002;}' unless defined(&HIFN_PUCNFG_ENCCNFG);
    eval 'sub HIFN_PUIER_CMDINVAL () {0x8000;}' unless defined(&HIFN_PUIER_CMDINVAL);
    eval 'sub HIFN_PUIER_DATAERR () {0x4000;}' unless defined(&HIFN_PUIER_DATAERR);
    eval 'sub HIFN_PUIER_SRCFIFO () {0x2000;}' unless defined(&HIFN_PUIER_SRCFIFO);
    eval 'sub HIFN_PUIER_DSTFIFO () {0x1000;}' unless defined(&HIFN_PUIER_DSTFIFO);
    eval 'sub HIFN_PUIER_DSTOVER () {0x0200;}' unless defined(&HIFN_PUIER_DSTOVER);
    eval 'sub HIFN_PUIER_SRCCMD () {0x0080;}' unless defined(&HIFN_PUIER_SRCCMD);
    eval 'sub HIFN_PUIER_SRCCTX () {0x0040;}' unless defined(&HIFN_PUIER_SRCCTX);
    eval 'sub HIFN_PUIER_SRCDATA () {0x0020;}' unless defined(&HIFN_PUIER_SRCDATA);
    eval 'sub HIFN_PUIER_DSTDATA () {0x0010;}' unless defined(&HIFN_PUIER_DSTDATA);
    eval 'sub HIFN_PUIER_DSTRESULT () {0x0004;}' unless defined(&HIFN_PUIER_DSTRESULT);
    eval 'sub HIFN_PUSTAT_CMDINVAL () {0x8000;}' unless defined(&HIFN_PUSTAT_CMDINVAL);
    eval 'sub HIFN_PUSTAT_DATAERR () {0x4000;}' unless defined(&HIFN_PUSTAT_DATAERR);
    eval 'sub HIFN_PUSTAT_SRCFIFO () {0x2000;}' unless defined(&HIFN_PUSTAT_SRCFIFO);
    eval 'sub HIFN_PUSTAT_DSTFIFO () {0x1000;}' unless defined(&HIFN_PUSTAT_DSTFIFO);
    eval 'sub HIFN_PUSTAT_DSTOVER () {0x0200;}' unless defined(&HIFN_PUSTAT_DSTOVER);
    eval 'sub HIFN_PUSTAT_SRCCMD () {0x0080;}' unless defined(&HIFN_PUSTAT_SRCCMD);
    eval 'sub HIFN_PUSTAT_SRCCTX () {0x0040;}' unless defined(&HIFN_PUSTAT_SRCCTX);
    eval 'sub HIFN_PUSTAT_SRCDATA () {0x0020;}' unless defined(&HIFN_PUSTAT_SRCDATA);
    eval 'sub HIFN_PUSTAT_DSTDATA () {0x0010;}' unless defined(&HIFN_PUSTAT_DSTDATA);
    eval 'sub HIFN_PUSTAT_DSTRESULT () {0x0004;}' unless defined(&HIFN_PUSTAT_DSTRESULT);
    eval 'sub HIFN_PUSTAT_CHIPREV () {0x00ff;}' unless defined(&HIFN_PUSTAT_CHIPREV);
    eval 'sub HIFN_PUSTAT_CHIPENA () {0xff00;}' unless defined(&HIFN_PUSTAT_CHIPENA);
    eval 'sub HIFN_PUSTAT_ENA_2 () {0x1100;}' unless defined(&HIFN_PUSTAT_ENA_2);
    eval 'sub HIFN_PUSTAT_ENA_1 () {0x1000;}' unless defined(&HIFN_PUSTAT_ENA_1);
    eval 'sub HIFN_PUSTAT_ENA_0 () {0x3000;}' unless defined(&HIFN_PUSTAT_ENA_0);
    eval 'sub HIFN_PUSTAT_REV_2 () {0x0020;}' unless defined(&HIFN_PUSTAT_REV_2);
    eval 'sub HIFN_PUSTAT_REV_3 () {0x0030;}' unless defined(&HIFN_PUSTAT_REV_3);
    eval 'sub HIFN_FIFOSTAT_SRC () {0x7f00;}' unless defined(&HIFN_FIFOSTAT_SRC);
    eval 'sub HIFN_FIFOSTAT_DST () {0x007f;}' unless defined(&HIFN_FIFOSTAT_DST);
    eval 'sub HIFN_FIFOCNFG_THRESHOLD () {0x0400;}' unless defined(&HIFN_FIFOCNFG_THRESHOLD);
    eval 'sub HIFN_1_DMA_CRAR () {0x0c;}' unless defined(&HIFN_1_DMA_CRAR);
    eval 'sub HIFN_1_DMA_SRAR () {0x1c;}' unless defined(&HIFN_1_DMA_SRAR);
    eval 'sub HIFN_1_DMA_RRAR () {0x2c;}' unless defined(&HIFN_1_DMA_RRAR);
    eval 'sub HIFN_1_DMA_DRAR () {0x3c;}' unless defined(&HIFN_1_DMA_DRAR);
    eval 'sub HIFN_1_DMA_CSR () {0x40;}' unless defined(&HIFN_1_DMA_CSR);
    eval 'sub HIFN_1_DMA_IER () {0x44;}' unless defined(&HIFN_1_DMA_IER);
    eval 'sub HIFN_1_DMA_CNFG () {0x48;}' unless defined(&HIFN_1_DMA_CNFG);
    eval 'sub HIFN_1_REVID () {0x98;}' unless defined(&HIFN_1_REVID);
    eval 'sub HIFN_DMACSR_D_CTRLMASK () {0xc0000000;}' unless defined(&HIFN_DMACSR_D_CTRLMASK);
    eval 'sub HIFN_DMACSR_D_CTRL_NOP () {0x00000000;}' unless defined(&HIFN_DMACSR_D_CTRL_NOP);
    eval 'sub HIFN_DMACSR_D_CTRL_DIS () {0x40000000;}' unless defined(&HIFN_DMACSR_D_CTRL_DIS);
    eval 'sub HIFN_DMACSR_D_CTRL_ENA () {0x80000000;}' unless defined(&HIFN_DMACSR_D_CTRL_ENA);
    eval 'sub HIFN_DMACSR_D_ABORT () {0x20000000;}' unless defined(&HIFN_DMACSR_D_ABORT);
    eval 'sub HIFN_DMACSR_D_DONE () {0x10000000;}' unless defined(&HIFN_DMACSR_D_DONE);
    eval 'sub HIFN_DMACSR_D_LAST () {0x08000000;}' unless defined(&HIFN_DMACSR_D_LAST);
    eval 'sub HIFN_DMACSR_D_WAIT () {0x04000000;}' unless defined(&HIFN_DMACSR_D_WAIT);
    eval 'sub HIFN_DMACSR_D_OVER () {0x02000000;}' unless defined(&HIFN_DMACSR_D_OVER);
    eval 'sub HIFN_DMACSR_R_CTRL () {0x00c00000;}' unless defined(&HIFN_DMACSR_R_CTRL);
    eval 'sub HIFN_DMACSR_R_CTRL_NOP () {0x00000000;}' unless defined(&HIFN_DMACSR_R_CTRL_NOP);
    eval 'sub HIFN_DMACSR_R_CTRL_DIS () {0x00400000;}' unless defined(&HIFN_DMACSR_R_CTRL_DIS);
    eval 'sub HIFN_DMACSR_R_CTRL_ENA () {0x00800000;}' unless defined(&HIFN_DMACSR_R_CTRL_ENA);
    eval 'sub HIFN_DMACSR_R_ABORT () {0x00200000;}' unless defined(&HIFN_DMACSR_R_ABORT);
    eval 'sub HIFN_DMACSR_R_DONE () {0x00100000;}' unless defined(&HIFN_DMACSR_R_DONE);
    eval 'sub HIFN_DMACSR_R_LAST () {0x00080000;}' unless defined(&HIFN_DMACSR_R_LAST);
    eval 'sub HIFN_DMACSR_R_WAIT () {0x00040000;}' unless defined(&HIFN_DMACSR_R_WAIT);
    eval 'sub HIFN_DMACSR_R_OVER () {0x00020000;}' unless defined(&HIFN_DMACSR_R_OVER);
    eval 'sub HIFN_DMACSR_S_CTRL () {0x0000c000;}' unless defined(&HIFN_DMACSR_S_CTRL);
    eval 'sub HIFN_DMACSR_S_CTRL_NOP () {0x00000000;}' unless defined(&HIFN_DMACSR_S_CTRL_NOP);
    eval 'sub HIFN_DMACSR_S_CTRL_DIS () {0x00004000;}' unless defined(&HIFN_DMACSR_S_CTRL_DIS);
    eval 'sub HIFN_DMACSR_S_CTRL_ENA () {0x00008000;}' unless defined(&HIFN_DMACSR_S_CTRL_ENA);
    eval 'sub HIFN_DMACSR_S_ABORT () {0x00002000;}' unless defined(&HIFN_DMACSR_S_ABORT);
    eval 'sub HIFN_DMACSR_S_DONE () {0x00001000;}' unless defined(&HIFN_DMACSR_S_DONE);
    eval 'sub HIFN_DMACSR_S_LAST () {0x00000800;}' unless defined(&HIFN_DMACSR_S_LAST);
    eval 'sub HIFN_DMACSR_S_WAIT () {0x00000400;}' unless defined(&HIFN_DMACSR_S_WAIT);
    eval 'sub HIFN_DMACSR_S_OVER () {0x00000200;}' unless defined(&HIFN_DMACSR_S_OVER);
    eval 'sub HIFN_DMACSR_C_CTRL () {0x000000c0;}' unless defined(&HIFN_DMACSR_C_CTRL);
    eval 'sub HIFN_DMACSR_C_CTRL_NOP () {0x00000000;}' unless defined(&HIFN_DMACSR_C_CTRL_NOP);
    eval 'sub HIFN_DMACSR_C_CTRL_DIS () {0x00000040;}' unless defined(&HIFN_DMACSR_C_CTRL_DIS);
    eval 'sub HIFN_DMACSR_C_CTRL_ENA () {0x00000080;}' unless defined(&HIFN_DMACSR_C_CTRL_ENA);
    eval 'sub HIFN_DMACSR_C_ABORT () {0x00000020;}' unless defined(&HIFN_DMACSR_C_ABORT);
    eval 'sub HIFN_DMACSR_C_DONE () {0x00000010;}' unless defined(&HIFN_DMACSR_C_DONE);
    eval 'sub HIFN_DMACSR_C_LAST () {0x00000008;}' unless defined(&HIFN_DMACSR_C_LAST);
    eval 'sub HIFN_DMACSR_C_WAIT () {0x00000004;}' unless defined(&HIFN_DMACSR_C_WAIT);
    eval 'sub HIFN_DMACSR_C_EIRQ () {0x00000001;}' unless defined(&HIFN_DMACSR_C_EIRQ);
    eval 'sub HIFN_DMAIER_D_ABORT () {0x20000000;}' unless defined(&HIFN_DMAIER_D_ABORT);
    eval 'sub HIFN_DMAIER_D_DONE () {0x10000000;}' unless defined(&HIFN_DMAIER_D_DONE);
    eval 'sub HIFN_DMAIER_D_LAST () {0x08000000;}' unless defined(&HIFN_DMAIER_D_LAST);
    eval 'sub HIFN_DMAIER_D_WAIT () {0x04000000;}' unless defined(&HIFN_DMAIER_D_WAIT);
    eval 'sub HIFN_DMAIER_D_OVER () {0x02000000;}' unless defined(&HIFN_DMAIER_D_OVER);
    eval 'sub HIFN_DMAIER_R_ABORT () {0x00200000;}' unless defined(&HIFN_DMAIER_R_ABORT);
    eval 'sub HIFN_DMAIER_R_DONE () {0x00100000;}' unless defined(&HIFN_DMAIER_R_DONE);
    eval 'sub HIFN_DMAIER_R_LAST () {0x00080000;}' unless defined(&HIFN_DMAIER_R_LAST);
    eval 'sub HIFN_DMAIER_R_WAIT () {0x00040000;}' unless defined(&HIFN_DMAIER_R_WAIT);
    eval 'sub HIFN_DMAIER_R_OVER () {0x00020000;}' unless defined(&HIFN_DMAIER_R_OVER);
    eval 'sub HIFN_DMAIER_S_ABORT () {0x00002000;}' unless defined(&HIFN_DMAIER_S_ABORT);
    eval 'sub HIFN_DMAIER_S_DONE () {0x00001000;}' unless defined(&HIFN_DMAIER_S_DONE);
    eval 'sub HIFN_DMAIER_S_LAST () {0x00000800;}' unless defined(&HIFN_DMAIER_S_LAST);
    eval 'sub HIFN_DMAIER_S_WAIT () {0x00000400;}' unless defined(&HIFN_DMAIER_S_WAIT);
    eval 'sub HIFN_DMAIER_S_OVER () {0x00000200;}' unless defined(&HIFN_DMAIER_S_OVER);
    eval 'sub HIFN_DMAIER_C_ABORT () {0x00000020;}' unless defined(&HIFN_DMAIER_C_ABORT);
    eval 'sub HIFN_DMAIER_C_DONE () {0x00000010;}' unless defined(&HIFN_DMAIER_C_DONE);
    eval 'sub HIFN_DMAIER_C_LAST () {0x00000008;}' unless defined(&HIFN_DMAIER_C_LAST);
    eval 'sub HIFN_DMAIER_C_WAIT () {0x00000004;}' unless defined(&HIFN_DMAIER_C_WAIT);
    eval 'sub HIFN_DMAIER_ENGINE () {0x00000001;}' unless defined(&HIFN_DMAIER_ENGINE);
    eval 'sub HIFN_DMACNFG_BIGENDIAN () {0x10000000;}' unless defined(&HIFN_DMACNFG_BIGENDIAN);
    eval 'sub HIFN_DMACNFG_POLLFREQ () {0x00ff0000;}' unless defined(&HIFN_DMACNFG_POLLFREQ);
    eval 'sub HIFN_DMACNFG_UNLOCK () {0x00000800;}' unless defined(&HIFN_DMACNFG_UNLOCK);
    eval 'sub HIFN_DMACNFG_POLLINVAL () {0x00000700;}' unless defined(&HIFN_DMACNFG_POLLINVAL);
    eval 'sub HIFN_DMACNFG_LAST () {0x00000010;}' unless defined(&HIFN_DMACNFG_LAST);
    eval 'sub HIFN_DMACNFG_MODE () {0x00000004;}' unless defined(&HIFN_DMACNFG_MODE);
    eval 'sub HIFN_DMACNFG_DMARESET () {0x00000002;}' unless defined(&HIFN_DMACNFG_DMARESET);
    eval 'sub HIFN_DMACNFG_MSTRESET () {0x00000001;}' unless defined(&HIFN_DMACNFG_MSTRESET);
    eval 'sub WRITE_REG_0 {
        local($sc,$reg,$val) = @_;
	    eval q( &bus_space_write_4(($sc)-> &sc_st0, ($sc)-> &sc_sh0, $reg, $val));
    }' unless defined(&WRITE_REG_0);
    eval 'sub READ_REG_0 {
        local($sc,$reg) = @_;
	    eval q( &bus_space_read_4(($sc)-> &sc_st0, ($sc)-> &sc_sh0, $reg));
    }' unless defined(&READ_REG_0);
    eval 'sub HIFN_UNLOCK_SECRET1 () {0xf4;}' unless defined(&HIFN_UNLOCK_SECRET1);
    eval 'sub HIFN_UNLOCK_SECRET2 () {0xfc;}' unless defined(&HIFN_UNLOCK_SECRET2);
    eval 'sub WRITE_REG_1 {
        local($sc,$reg,$val) = @_;
	    eval q( &bus_space_write_4(($sc)-> &sc_st1, ($sc)-> &sc_sh1, $reg, $val));
    }' unless defined(&WRITE_REG_1);
    eval 'sub READ_REG_1 {
        local($sc,$reg) = @_;
	    eval q( &bus_space_read_4(($sc)-> &sc_st1, ($sc)-> &sc_sh1, $reg));
    }' unless defined(&READ_REG_1);
    eval 'sub HIFN_BASE_CMD_MAC () {(0x1 << 10);}' unless defined(&HIFN_BASE_CMD_MAC);
    eval 'sub HIFN_BASE_CMD_CRYPT () {(0x1 << 11);}' unless defined(&HIFN_BASE_CMD_CRYPT);
    eval 'sub HIFN_BASE_CMD_DECODE () {(0x1 << 13);}' unless defined(&HIFN_BASE_CMD_DECODE);
    eval 'sub HIFN_CRYPT_CMD_ALG_MASK () {(0x3 << 0);}' unless defined(&HIFN_CRYPT_CMD_ALG_MASK);
    eval 'sub HIFN_CRYPT_CMD_ALG_DES () {(0x0 << 0);}' unless defined(&HIFN_CRYPT_CMD_ALG_DES);
    eval 'sub HIFN_CRYPT_CMD_ALG_3DES () {(0x1 << 0);}' unless defined(&HIFN_CRYPT_CMD_ALG_3DES);
    eval 'sub HIFN_CRYPT_CMD_MODE_CBC () {(0x1 << 3);}' unless defined(&HIFN_CRYPT_CMD_MODE_CBC);
    eval 'sub HIFN_CRYPT_CMD_NEW_KEY () {(0x1 << 11);}' unless defined(&HIFN_CRYPT_CMD_NEW_KEY);
    eval 'sub HIFN_CRYPT_CMD_NEW_IV () {(0x1 << 12);}' unless defined(&HIFN_CRYPT_CMD_NEW_IV);
    eval 'sub HIFN_MAC_CMD_ALG_MD5 () {(0x1 << 0);}' unless defined(&HIFN_MAC_CMD_ALG_MD5);
    eval 'sub HIFN_MAC_CMD_ALG_SHA1 () {(0x0 << 0);}' unless defined(&HIFN_MAC_CMD_ALG_SHA1);
    eval 'sub HIFN_MAC_CMD_MODE_HMAC () {(0x0 << 2);}' unless defined(&HIFN_MAC_CMD_MODE_HMAC);
    eval 'sub HIFN_MAC_CMD_TRUNC () {(0x1 << 4);}' unless defined(&HIFN_MAC_CMD_TRUNC);
    eval 'sub HIFN_MAC_CMD_RESULT () {(0x1 << 5);}' unless defined(&HIFN_MAC_CMD_RESULT);
    eval 'sub HIFN_MAC_CMD_APPEND () {(0x1 << 6);}' unless defined(&HIFN_MAC_CMD_APPEND);
    eval 'sub HIFN_MAC_CMD_POS_IPSEC () {(0x2 << 8);}' unless defined(&HIFN_MAC_CMD_POS_IPSEC);
    eval 'sub HIFN_MAC_CMD_NEW_KEY () {(0x1 << 11);}' unless defined(&HIFN_MAC_CMD_NEW_KEY);
    unless(defined(&HIFN_POLL_FREQUENCY)) {
	eval 'sub HIFN_POLL_FREQUENCY () {0x1;}' unless defined(&HIFN_POLL_FREQUENCY);
    }
    unless(defined(&HIFN_POLL_SCALAR)) {
	eval 'sub HIFN_POLL_SCALAR () {0x0;}' unless defined(&HIFN_POLL_SCALAR);
    }
}
1;
