AHC(4)                    OpenBSD Programmer's Manual                   AHC(4)

NAME
     ahc - Adaptec VL/EISA/PCI SCSI host adapter driver

SYNOPSIS
     For VL cards:
     ahc0 at isa? port ? irq ?

     For EISA cards:
     ahc* at eisa? slot ?

     For PCI cards:
     ahc* at pci? dev ? function ?

     For SCSI busses:
     scsibus* at ahc?

DESCRIPTION
     This driver provides access to the SCSI bus(es) connected to Adaptec
     AIC7770, AIC7850, AIC7860, AIC7870, AIC7880, AIC7890, AIC7891, AIC7895,
     AIC7896, AIC7892, AIC7897, or AIC7899 host adapter chips.  These chips
     are found on many motherboards as well as the following Adaptec SCSI con-
     troller cards: 274X(W), 274X(T), 284X, 2920C, 2930U2, 2930CU, 2940,
     2940U, 2940AU, 2940UW, 2940UW Dual, 2940U2W, 2940U2B, 2950U2W, 2950U2B,
     29160, 3940, 3940U, 3940AU, 3940UW, 3940AUW, 3940U2W, 3950U2, and 3985.

     Driver features include support for twin and wide busses, fast, ultra and
     ultra2 synchronous transfers depending on controller type, tagged queu-
     ing, and SCB paging.

     Memory mapped I/O can be enabled for PCI devices with the
     ``AHC_ALLOW_MEMIO'' configuration option.  Memory mapped I/O is more ef-
     ficient than the alternative, programmed I/O.  Most PCI BIOSes will map
     devices so that either technique for communicating with the card is
     available.  In some cases, usually when the PCI device is sitting behind
     a PCI->PCI bridge, the BIOS fails to properly initialize the chip for
     memory mapped I/O.  The symptom of this problem is usually a system hang
     if memory mapped I/O is attempted.  Most modern motherboards perform the
     initialization correctly and work fine with this option enabled.

     Per target configuration performed in the SCSI-Select menu, accessible at
     boot in non-EISA models, or through an EISA configuration utility for
     EISA models, is honored by this driver with the stipulation that the BIOS
     must be enabled for EISA adaptors.  This includes synchronous/asyn-
     chronous transfers, maximum synchronous negotiation rate, disconnection,
     the host adapter's SCSI ID, and, in the case of EISA Twin Channel con-
     trollers, the primary channel selection.

     Performance and feature sets vary throughout the aic7xxx product line.
     The following table provides a comparison of the different chips support-
     ed by the ahc driver.  Note that wide and twin channel features, although
     always supported by a particular chip, may be disabled in a particular
     motherboard or card design.

           Chip       MIPS    Bus      MaxSync   MaxWidth  SCBs  Features
           aic7770     10    EISA/VL    10MHz     16Bit     4    1
           aic7850     10    PCI/32     10MHz      8Bit     3
           aic7860     10    PCI/32     20MHz      8Bit     3
           aic7870     10    PCI/32     10MHz     16Bit    16
           aic7880     10    PCI/32     20MHz     16Bit    16
           aic7890     20    PCI/32     40MHz     16Bit    16        3 4 5 6 7
           aic7891     20    PCI/64     40MHz     16Bit    16        3 4 5 6 7
           aic7895     15    PCI/32     20MHz     16Bit    16      2 3 4 5
           aic7896     20    PCI/32     40MHz     16Bit    16      2 3 4 5 6 7
           aic7897     20    PCI/64     40MHz     16Bit    16      2 3 4 5 6 7

           1.   Multiplexed Twin Channel Device - One controller servicing two
                busses.
           2.   Multi-function Twin Channel Device - Two controllers on one
                chip.
           3.   Command Channel Secondary DMA Engine - Allows scatter gather
                list and SCB prefetch.
           4.   64 Byte SCB Support - SCSI CDB is embedded in the SCB to elim-
                inate an extra DMA.
           5.   Block Move Instruction Support - Doubles the speed of certain
                sequencer operations.
           6.   `Bayonet' style Scatter Gather Engine - Improves S/G prefetch
                performance.
           7.   Queuing Registers - Allows queuing of new transactions without
                pausing the sequencer.

SCSI CONTROL BLOCKS (SCBs)
     Every transaction sent to a device on the SCSI bus is assigned a `SCSI
     Control Block' (SCB).  The SCB contains all of the information required
     by the controller to process a transaction.  The chip feature table lists
     the number of SCBs that can be stored in on chip memory.  All chips with
     model numbers greater than or equal to 7870 allow for the on-chip SCB
     space to be augmented with external SRAM up to a maximum of 255 SCBs.
     Very few Adaptec controller have external SRAM.

     If external SRAM is not available, SCBs are a limited resource and using
     them in a straight forward manner would only allow us to keep as many
     transactions as there are SCBs outstanding at a time.  This would not al-
     low enough concurrency to fully utilize the SCSI bus and its devices.
     The solution to this problem is SCB Paging, a concept similar to memory
     paging.  SCB paging takes advantage of the fact that devices usually dis-
     connect from the SCSI bus for long periods of time without talking to the
     controller.  The SCBs for disconnected transactions are only of use to
     the controller when the transfer is resumed.  When the host queues anoth-
     er transaction for the controller to execute, the controller firmware
     will use a free SCB if one is available.  Otherwise, the state of the
     most recently disconnected (and therefore most likely to stay disconnect-
     ed) SCB is saved, via DMA, to host memory, and the local SCB reused to
     start the new transaction.  This allows the controller to queue up to 255
     transactions regardless of the amount of SCB space.  Since the local SCB
     space serves as a cache for disconnected transactions, the more SCB space
     available, the less host bus traffic consumed saving and restoring SCB
     data.

SEE ALSO
     aha(4), ahb(4)

AUTHORS
     The ahc driver, the AIC7xxx sequencer-code assembler, and the firmware
     running on the aic7xxx chips were written by Justin T. Gibbs.

BUGS
     Some Quantum drives (at least the Empire 2100 and 1080s) will not run on
     an AIC7870 Rev B in synchronous mode at 10MHz.  Controllers with this
     problem have a 42 MHz clock crystal on them and run slightly above 10MHz.
     This confuses the drive and hangs the bus.  Setting a maximum synchronous
     negotiation rate of 8MHz in the SCSI-Select utility will allow normal op-
     eration.

OpenBSD 3.0                     March 20, 2000                               2
