require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_DEV_IC_WDCVAR_H_)) {
    eval 'sub _DEV_IC_WDCVAR_H_ () {1;}' unless defined(&_DEV_IC_WDCVAR_H_);
    require 'sys/timeout.ph';
    eval 'sub WDC_OPTION_PROBE_VERBOSE () {0x10000;}' unless defined(&WDC_OPTION_PROBE_VERBOSE);
    eval 'sub WDCF_ACTIVE () {0x1;}' unless defined(&WDCF_ACTIVE);
    eval 'sub WDCF_ONESLAVE () {0x2;}' unless defined(&WDCF_ONESLAVE);
    eval 'sub WDCF_IRQ_WAIT () {0x10;}' unless defined(&WDCF_IRQ_WAIT);
    eval 'sub WDCF_DMA_WAIT () {0x20;}' unless defined(&WDCF_DMA_WAIT);
    eval 'sub WDCF_VERBOSE_PROBE () {0x40;}' unless defined(&WDCF_VERBOSE_PROBE);
    eval 'sub _WDC_REGMASK () {7;}' unless defined(&_WDC_REGMASK);
    eval 'sub _WDC_AUX () {8;}' unless defined(&_WDC_AUX);
    eval 'sub _WDC_RDONLY () {16;}' unless defined(&_WDC_RDONLY);
    eval 'sub _WDC_WRONLY () {32;}' unless defined(&_WDC_WRONLY);
    eval("sub wdr_error () { _WDC_RDONLY|1; }") unless defined(&wdr_error);
    eval("sub wdr_precomp () { _WDC_WRONLY|1; }") unless defined(&wdr_precomp);
    eval("sub wdr_features () { _WDC_WRONLY|1; }") unless defined(&wdr_features);
    eval("sub wdr_seccnt () { 2; }") unless defined(&wdr_seccnt);
    eval("sub wdr_ireason () { 2; }") unless defined(&wdr_ireason);
    eval("sub wdr_sector () { 3; }") unless defined(&wdr_sector);
    eval("sub wdr_lba_lo () { 3; }") unless defined(&wdr_lba_lo);
    eval("sub wdr_cyl_lo () { 4; }") unless defined(&wdr_cyl_lo);
    eval("sub wdr_lba_mi () { 4; }") unless defined(&wdr_lba_mi);
    eval("sub wdr_cyl_hi () { 5; }") unless defined(&wdr_cyl_hi);
    eval("sub wdr_lba_hi () { 5; }") unless defined(&wdr_lba_hi);
    eval("sub wdr_sdh () { 6; }") unless defined(&wdr_sdh);
    eval("sub wdr_status () { _WDC_RDONLY|7; }") unless defined(&wdr_status);
    eval("sub wdr_command () { _WDC_WRONLY|7; }") unless defined(&wdr_command);
    eval("sub wdr_altsts () { _WDC_RDONLY|_WDC_AUX; }") unless defined(&wdr_altsts);
    eval("sub wdr_ctlr () { _WDC_WRONLY|_WDC_AUX; }") unless defined(&wdr_ctlr);
    eval 'sub WDC_NREG () {8;}' unless defined(&WDC_NREG);
    eval 'sub WDC_NSHADOWREG () {2;}' unless defined(&WDC_NSHADOWREG);
    eval 'sub CHP_READ_REG {
        my($chp, $a) = @_;
	    eval q((($chp)-> ($_vtbl->{read_reg}))($chp, $a));
    }' unless defined(&CHP_READ_REG);
    eval 'sub CHP_WRITE_REG {
        my($chp, $a, $b) = @_;
	    eval q((($chp)-> ($_vtbl->{write_reg}))($chp, $a, $b));
    }' unless defined(&CHP_WRITE_REG);
    eval 'sub CHP_LBA48_WRITE_REG {
        my($chp, $a, $b) = @_;
	    eval q((($chp)-> ($_vtbl->{l$ba48_write_reg}))($chp, $a, $b));
    }' unless defined(&CHP_LBA48_WRITE_REG);
    eval 'sub CHP_READ_RAW_MULTI_2 {
        my($chp, $a, $b) = @_;
	    eval q((($chp)-> ($_vtbl->{read_raw_multi_2}))($chp, $a, $b));
    }' unless defined(&CHP_READ_RAW_MULTI_2);
    eval 'sub CHP_WRITE_RAW_MULTI_2 {
        my($chp, $a, $b) = @_;
	    eval q((($chp)-> ($_vtbl->{write_raw_multi_2}))($chp, $a, $b));
    }' unless defined(&CHP_WRITE_RAW_MULTI_2);
    eval 'sub CHP_READ_RAW_MULTI_4 {
        my($chp, $a, $b) = @_;
	    eval q((($chp)-> ($_vtbl->{read_raw_multi_4}))($chp, $a, $b));
    }' unless defined(&CHP_READ_RAW_MULTI_4);
    eval 'sub CHP_WRITE_RAW_MULTI_4 {
        my($chp, $a, $b) = @_;
	    eval q((($chp)-> ($_vtbl->{write_raw_multi_4}))($chp, $a, $b));
    }' unless defined(&CHP_WRITE_RAW_MULTI_4);
    eval 'sub WDC_CAPABILITY_DATA16 () {0x1;}' unless defined(&WDC_CAPABILITY_DATA16);
    eval 'sub WDC_CAPABILITY_DATA32 () {0x2;}' unless defined(&WDC_CAPABILITY_DATA32);
    eval 'sub WDC_CAPABILITY_MODE () {0x4;}' unless defined(&WDC_CAPABILITY_MODE);
    eval 'sub WDC_CAPABILITY_DMA () {0x8;}' unless defined(&WDC_CAPABILITY_DMA);
    eval 'sub WDC_CAPABILITY_UDMA () {0x10;}' unless defined(&WDC_CAPABILITY_UDMA);
    eval 'sub WDC_CAPABILITY_HWLOCK () {0x20;}' unless defined(&WDC_CAPABILITY_HWLOCK);
    eval 'sub WDC_CAPABILITY_ATA_NOSTREAM () {0x40;}' unless defined(&WDC_CAPABILITY_ATA_NOSTREAM);
    eval 'sub WDC_CAPABILITY_ATAPI_NOSTREAM () {0x80;}' unless defined(&WDC_CAPABILITY_ATAPI_NOSTREAM);
    eval 'sub WDC_CAPABILITY_NO_EXTRA_RESETS () {0x100;}' unless defined(&WDC_CAPABILITY_NO_EXTRA_RESETS);
    eval 'sub WDC_CAPABILITY_PREATA () {0x200;}' unless defined(&WDC_CAPABILITY_PREATA);
    eval 'sub WDC_CAPABILITY_IRQACK () {0x400;}' unless defined(&WDC_CAPABILITY_IRQACK);
    eval 'sub WDC_CAPABILITY_SINGLE_DRIVE () {0x800;}' unless defined(&WDC_CAPABILITY_SINGLE_DRIVE);
    eval 'sub WDC_CAPABILITY_NO_ATAPI_DMA () {0x1000;}' unless defined(&WDC_CAPABILITY_NO_ATAPI_DMA);
    eval 'sub WDC_CAPABILITY_SATA () {0x2000;}' unless defined(&WDC_CAPABILITY_SATA);
    eval 'sub WDC_QUIRK_NOSHORTDMA () {0x1;}' unless defined(&WDC_QUIRK_NOSHORTDMA);
    if(0) {
    }
    eval 'sub WDC_DMA_READ () {0x1;}' unless defined(&WDC_DMA_READ);
    eval 'sub WDC_DMA_IRQW () {0x2;}' unless defined(&WDC_DMA_IRQW);
    eval 'sub WDC_DMA_LBA48 () {0x4;}' unless defined(&WDC_DMA_LBA48);
    eval 'sub WDC_DMAST_NOIRQ () {0x1;}' unless defined(&WDC_DMAST_NOIRQ);
    eval 'sub WDC_DMAST_ERR () {0x2;}' unless defined(&WDC_DMAST_ERR);
    eval 'sub WDC_DMAST_UNDER () {0x4;}' unless defined(&WDC_DMAST_UNDER);
    eval 'sub C_ATAPI () {0x2;}' unless defined(&C_ATAPI);
    eval 'sub C_TIMEOU () {0x4;}' unless defined(&C_TIMEOU);
    eval 'sub C_NEEDDONE () {0x10;}' unless defined(&C_NEEDDONE);
    eval 'sub C_POLL () {0x20;}' unless defined(&C_POLL);
    eval 'sub C_DMA () {0x40;}' unless defined(&C_DMA);
    eval 'sub C_SENSE () {0x80;}' unless defined(&C_SENSE);
    eval 'sub C_MEDIA_ACCESS () {0x100;}' unless defined(&C_MEDIA_ACCESS);
    eval 'sub C_POLL_MACHINE () {0x200;}' unless defined(&C_POLL_MACHINE);
    eval 'sub WDC_CANSLEEP () {0x;}' unless defined(&WDC_CANSLEEP);
    eval 'sub WDC_NOSLEEP () {0x1;}' unless defined(&WDC_NOSLEEP);
    eval 'sub VERBOSE () {1;}' unless defined(&VERBOSE);
    eval 'sub SILENT () {0;}' unless defined(&SILENT);
    eval 'sub wdcwait {
        my($chp, $status, $mask, $timeout) = @_;
	    eval q((( &wdc_wait_for_status(($chp), ($status), ($mask), ($timeout)) >= 0) ? 0: -1));
    }' unless defined(&wdcwait);
    eval 'sub wait_for_drq {
        my($chp, $timeout) = @_;
	    eval q( &wdcwait(($chp),  &WDCS_DRQ,  &WDCS_DRQ, ($timeout)));
    }' unless defined(&wait_for_drq);
    eval 'sub wait_for_unbusy {
        my($chp, $timeout) = @_;
	    eval q( &wdcwait(($chp), 0, 0, ($timeout)));
    }' unless defined(&wait_for_unbusy);
    eval 'sub wait_for_ready {
        my($chp, $timeout) = @_;
	    eval q( &wdcwait(($chp),  &WDCS_DRDY,  &WDCS_DRDY, ($timeout)));
    }' unless defined(&wait_for_ready);
    eval 'sub WDC_RESET_WAIT () {31000;}' unless defined(&WDC_RESET_WAIT);
}
1;
