require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&__MACHINE_MVME187_H__)) {
    eval 'sub __MACHINE_MVME187_H__ () {1;}' unless defined(&__MACHINE_MVME187_H__);
    eval 'sub BUG187_START () {0xff800000;}' unless defined(&BUG187_START);
    eval 'sub BUG187_SIZE () {0x400000;}' unless defined(&BUG187_SIZE);
    eval 'sub SRAM_START () {0xffe00000;}' unless defined(&SRAM_START);
    eval 'sub SRAM_SIZE () {0x20000;}' unless defined(&SRAM_SIZE);
    eval 'sub OBIO187_START () {0xfff40000;}' unless defined(&OBIO187_START);
    eval 'sub OBIO187_SIZE () {0xb0000;}' unless defined(&OBIO187_SIZE);
    eval 'sub SBC_CMMU_I () {0xfff77000;}' unless defined(&SBC_CMMU_I);
    eval 'sub SBC_CMMU_D () {0xfff7f000;}' unless defined(&SBC_CMMU_D);
    eval 'sub M187_ILEVEL () {0xfff4203e;}' unless defined(&M187_ILEVEL);
    eval 'sub M187_IMASK () {0xfff4203f;}' unless defined(&M187_IMASK);
    eval 'sub M187_ISRC () {0x;}' unless defined(&M187_ISRC);
    eval 'sub M187_IACK () {0xfffe0000;}' unless defined(&M187_IACK);
    eval 'sub MEM_CTLR () {0xfff43000;}' unless defined(&MEM_CTLR);
    if(defined( &_KERNEL)  && !defined( &_LOCORE)) {
    }
}
1;
