require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_SCSI_TAPE_H_)) {
    eval 'sub _SCSI_TAPE_H_ () {1;}' unless defined(&_SCSI_TAPE_H_);
    eval 'sub READ () {0x8;}' unless defined(&READ);
    eval 'sub WRITE () {0xa;}' unless defined(&WRITE);
    eval 'sub SRW_FIXED () {0x1;}' unless defined(&SRW_FIXED);
    eval 'sub SPACE () {0x11;}' unless defined(&SPACE);
    eval 'sub SS_CODE () {0x3;}' unless defined(&SS_CODE);
    eval 'sub SP_BLKS () {0x;}' unless defined(&SP_BLKS);
    eval 'sub SP_FILEMARKS () {0x1;}' unless defined(&SP_FILEMARKS);
    eval 'sub SP_SEQ_FILEMARKS () {0x2;}' unless defined(&SP_SEQ_FILEMARKS);
    eval 'sub SP_EOM () {0x3;}' unless defined(&SP_EOM);
    eval 'sub WRITE_FILEMARKS () {0x10;}' unless defined(&WRITE_FILEMARKS);
    eval 'sub REWIND () {0x1;}' unless defined(&REWIND);
    eval 'sub SR_IMMED () {0x1;}' unless defined(&SR_IMMED);
    eval 'sub LOAD () {0x1b;}' unless defined(&LOAD);
    eval 'sub SL_IMMED () {0x1;}' unless defined(&SL_IMMED);
    eval 'sub LD_UNLOAD () {0x;}' unless defined(&LD_UNLOAD);
    eval 'sub LD_LOAD () {0x1;}' unless defined(&LD_LOAD);
    eval 'sub LD_RETENSION () {0x2;}' unless defined(&LD_RETENSION);
    eval 'sub ERASE () {0x19;}' unless defined(&ERASE);
    eval 'sub SE_LONG () {0x1;}' unless defined(&SE_LONG);
    eval 'sub SE_IMMED () {0x2;}' unless defined(&SE_IMMED);
    eval 'sub READ_BLOCK_LIMITS () {0x5;}' unless defined(&READ_BLOCK_LIMITS);
    eval 'sub SMT_CAP () {0x40;}' unless defined(&SMT_CAP);
    eval 'sub SMT_CAF () {0x20;}' unless defined(&SMT_CAF);
    eval 'sub SMT_AFMASK () {0x1f;}' unless defined(&SMT_AFMASK);
    eval 'sub SMT_DBR () {0x80;}' unless defined(&SMT_DBR);
    eval 'sub SMT_BIS () {0x40;}' unless defined(&SMT_BIS);
    eval 'sub SMT_RSMK () {0x20;}' unless defined(&SMT_RSMK);
    eval 'sub SMT_AVC () {0x10;}' unless defined(&SMT_AVC);
    eval 'sub SMT_SOCF_MASK () {0xc0;}' unless defined(&SMT_SOCF_MASK);
    eval 'sub SMT_RBO () {0x20;}' unless defined(&SMT_RBO);
    eval 'sub SMT_REW () {0x10;}' unless defined(&SMT_REW);
    eval 'sub SMT_EODDEFINED () {0xe0;}' unless defined(&SMT_EODDEFINED);
    eval 'sub SMT_EEG () {0x10;}' unless defined(&SMT_EEG);
    eval 'sub SMT_SEW () {0x80;}' unless defined(&SMT_SEW);
    eval 'sub SMT_COMP_NONE () {0x;}' unless defined(&SMT_COMP_NONE);
    eval 'sub SMT_COMP_DEFAULT () {0x1;}' unless defined(&SMT_COMP_DEFAULT);
    eval 'sub SMH_DSP_SPEED () {0xf;}' unless defined(&SMH_DSP_SPEED);
    eval 'sub SMH_DSP_BUFF_MODE () {0x70;}' unless defined(&SMH_DSP_BUFF_MODE);
    eval 'sub SMH_DSP_BUFF_MODE_OFF () {0x;}' unless defined(&SMH_DSP_BUFF_MODE_OFF);
    eval 'sub SMH_DSP_BUFF_MODE_ON () {0x10;}' unless defined(&SMH_DSP_BUFF_MODE_ON);
    eval 'sub SMH_DSP_BUFF_MODE_MLTI () {0x20;}' unless defined(&SMH_DSP_BUFF_MODE_MLTI);
    eval 'sub SMH_DSP_WRITE_PROT () {0x80;}' unless defined(&SMH_DSP_WRITE_PROT);
    eval 'sub ST150_SEC () {0x1;}' unless defined(&ST150_SEC);
    eval 'sub SR150_AUI () {0x2;}' unless defined(&SR150_AUI);
    eval 'sub HALFINCH_800 () {0x1;}' unless defined(&HALFINCH_800);
    eval 'sub HALFINCH_1600 () {0x2;}' unless defined(&HALFINCH_1600);
    eval 'sub HALFINCH_6250 () {0x3;}' unless defined(&HALFINCH_6250);
    eval 'sub QIC_11 () {0x4;}' unless defined(&QIC_11);
    eval 'sub QIC_24 () {0x5;}' unless defined(&QIC_24);
    eval 'sub QIC_120 () {0xf;}' unless defined(&QIC_120);
    eval 'sub QIC_150 () {0x10;}' unless defined(&QIC_150);
    eval 'sub QIC_320 () {0x11;}' unless defined(&QIC_320);
    eval 'sub QIC_525 () {0x11;}' unless defined(&QIC_525);
    eval 'sub QIC_1320 () {0x12;}' unless defined(&QIC_1320);
    eval 'sub DDS () {0x13;}' unless defined(&DDS);
    eval 'sub DAT_1 () {0x13;}' unless defined(&DAT_1);
    eval 'sub QIC_3080 () {0x29;}' unless defined(&QIC_3080);
    eval 'sub QIC_3095 () {0x45;}' unless defined(&QIC_3095);
}
1;
