require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_DEV_ATA_ATAVAR_H_)) {
    eval 'sub _DEV_ATA_ATAVAR_H_ () {1;}' unless defined(&_DEV_ATA_ATAVAR_H_);
    require 'dev/ata/atareg.ph';
    eval 'sub DRIVE_ATA () {0x1;}' unless defined(&DRIVE_ATA);
    eval 'sub DRIVE_ATAPI () {0x2;}' unless defined(&DRIVE_ATAPI);
    eval 'sub DRIVE_OLD () {0x4;}' unless defined(&DRIVE_OLD);
    eval 'sub DRIVE () {( &DRIVE_ATA| &DRIVE_ATAPI| &DRIVE_OLD);}' unless defined(&DRIVE);
    eval 'sub DRIVE_CAP32 () {0x8;}' unless defined(&DRIVE_CAP32);
    eval 'sub DRIVE_DMA () {0x10;}' unless defined(&DRIVE_DMA);
    eval 'sub DRIVE_UDMA () {0x20;}' unless defined(&DRIVE_UDMA);
    eval 'sub DRIVE_MODE () {0x40;}' unless defined(&DRIVE_MODE);
    eval 'sub DRIVE_RESET () {0x80;}' unless defined(&DRIVE_RESET);
    eval 'sub DRIVE_DMAERR () {0x100;}' unless defined(&DRIVE_DMAERR);
    eval 'sub DRIVE_DSCBA () {0x200;}' unless defined(&DRIVE_DSCBA);
    eval 'sub DRIVE_DSCWAIT () {0x400;}' unless defined(&DRIVE_DSCWAIT);
    eval 'sub DRIVE_DEVICE_RESET () {0x800;}' unless defined(&DRIVE_DEVICE_RESET);
    eval 'sub DRIVE_SATA () {0x1000;}' unless defined(&DRIVE_SATA);
    eval 'sub ACAP_LEN () {0x1;}' unless defined(&ACAP_LEN);
    eval 'sub ACAP_DSC () {0x2;}' unless defined(&ACAP_DSC);
    eval 'sub NERRS_MAX () {4;}' unless defined(&NERRS_MAX);
    eval 'sub NXFER () {1000;}' unless defined(&NXFER);
    eval 'sub T_ATA () {0;}' unless defined(&T_ATA);
    eval 'sub T_ATAPI () {1;}' unless defined(&T_ATAPI);
    eval 'sub ATA_CONFIG_PIO_MODES () {0x7;}' unless defined(&ATA_CONFIG_PIO_MODES);
    eval 'sub ATA_CONFIG_PIO_SET () {0x8;}' unless defined(&ATA_CONFIG_PIO_SET);
    eval 'sub ATA_CONFIG_PIO_OFF () {0;}' unless defined(&ATA_CONFIG_PIO_OFF);
    eval 'sub ATA_CONFIG_DMA_MODES () {0x70;}' unless defined(&ATA_CONFIG_DMA_MODES);
    eval 'sub ATA_CONFIG_DMA_SET () {0x80;}' unless defined(&ATA_CONFIG_DMA_SET);
    eval 'sub ATA_CONFIG_DMA_DISABLE () {0x70;}' unless defined(&ATA_CONFIG_DMA_DISABLE);
    eval 'sub ATA_CONFIG_DMA_OFF () {4;}' unless defined(&ATA_CONFIG_DMA_OFF);
    eval 'sub ATA_CONFIG_UDMA_MODES () {0x700;}' unless defined(&ATA_CONFIG_UDMA_MODES);
    eval 'sub ATA_CONFIG_UDMA_SET () {0x800;}' unless defined(&ATA_CONFIG_UDMA_SET);
    eval 'sub ATA_CONFIG_UDMA_DISABLE () {0x700;}' unless defined(&ATA_CONFIG_UDMA_DISABLE);
    eval 'sub ATA_CONFIG_UDMA_OFF () {8;}' unless defined(&ATA_CONFIG_UDMA_OFF);
    eval 'sub AT_READ () {0x1;}' unless defined(&AT_READ);
    eval 'sub AT_WRITE () {0x2;}' unless defined(&AT_WRITE);
    eval 'sub AT_WAIT () {0x8;}' unless defined(&AT_WAIT);
    eval 'sub AT_POLL () {0x10;}' unless defined(&AT_POLL);
    eval 'sub AT_DONE () {0x20;}' unless defined(&AT_DONE);
    eval 'sub AT_ERROR () {0x40;}' unless defined(&AT_ERROR);
    eval 'sub AT_TIMEOU () {0x80;}' unless defined(&AT_TIMEOU);
    eval 'sub AT_DF () {0x100;}' unless defined(&AT_DF);
    eval 'sub AT_READREG () {0x200;}' unless defined(&AT_READREG);
    eval 'sub WDC_COMPLETE () {0x1;}' unless defined(&WDC_COMPLETE);
    eval 'sub WDC_QUEUED () {0x2;}' unless defined(&WDC_QUEUED);
    eval 'sub WDC_TRY_AGAIN () {0x3;}' unless defined(&WDC_TRY_AGAIN);
    eval 'sub CMD_OK () {0;}' unless defined(&CMD_OK);
    eval 'sub CMD_ERR () {1;}' unless defined(&CMD_ERR);
    eval 'sub CMD_AGAIN () {2;}' unless defined(&CMD_AGAIN);
}
1;
