require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_DEV_IC_WDCREG_H_)) {
    eval 'sub _DEV_IC_WDCREG_H_ () {1;}' unless defined(&_DEV_IC_WDCREG_H_);
    eval 'sub WDCTL_4BIT () {0x8;}' unless defined(&WDCTL_4BIT);
    eval 'sub WDCTL_RST () {0x4;}' unless defined(&WDCTL_RST);
    eval 'sub WDCTL_IDS () {0x2;}' unless defined(&WDCTL_IDS);
    eval 'sub WDCS_BSY () {0x80;}' unless defined(&WDCS_BSY);
    eval 'sub WDCS_DRDY () {0x40;}' unless defined(&WDCS_DRDY);
    eval 'sub WDCS_DWF () {0x20;}' unless defined(&WDCS_DWF);
    eval 'sub WDCS_DSC () {0x10;}' unless defined(&WDCS_DSC);
    eval 'sub WDCS_DRQ () {0x8;}' unless defined(&WDCS_DRQ);
    eval 'sub WDCS_CORR () {0x4;}' unless defined(&WDCS_CORR);
    eval 'sub WDCS_IDX () {0x2;}' unless defined(&WDCS_IDX);
    eval 'sub WDCS_ERR () {0x1;}' unless defined(&WDCS_ERR);
    eval 'sub WDCS_BITS () {"\\020\\010BSY\\007DRDY\\006DWF\\005DSC\\004DRQ\\003CORR\\002IDX\\001ERR";}' unless defined(&WDCS_BITS);
    eval 'sub WDCE_BBK () {0x80;}' unless defined(&WDCE_BBK);
    eval 'sub WDCE_CRC () {0x80;}' unless defined(&WDCE_CRC);
    eval 'sub WDCE_UNC () {0x40;}' unless defined(&WDCE_UNC);
    eval 'sub WDCE_MC () {0x20;}' unless defined(&WDCE_MC);
    eval 'sub WDCE_IDNF () {0x10;}' unless defined(&WDCE_IDNF);
    eval 'sub WDCE_MCR () {0x8;}' unless defined(&WDCE_MCR);
    eval 'sub WDCE_ABRT () {0x4;}' unless defined(&WDCE_ABRT);
    eval 'sub WDCE_TK0NF () {0x2;}' unless defined(&WDCE_TK0NF);
    eval 'sub WDCE_AMNF () {0x1;}' unless defined(&WDCE_AMNF);
    eval 'sub WDCC_NOP () {0x;}' unless defined(&WDCC_NOP);
    eval 'sub WDCC_RECAL () {0x10;}' unless defined(&WDCC_RECAL);
    eval 'sub WDCC_READ () {0x20;}' unless defined(&WDCC_READ);
    eval 'sub WDCC_WRITE () {0x30;}' unless defined(&WDCC_WRITE);
    eval 'sub WDCC__LONG () {0x2;}' unless defined(&WDCC__LONG);
    eval 'sub WDCC__NORETRY () {0x1;}' unless defined(&WDCC__NORETRY);
    eval 'sub WDCC_FORMAT () {0x50;}' unless defined(&WDCC_FORMAT);
    eval 'sub WDCC_DIAGNOSE () {0x90;}' unless defined(&WDCC_DIAGNOSE);
    eval 'sub WDCC_IDP () {0x91;}' unless defined(&WDCC_IDP);
    eval 'sub WDCC_READMULTI () {0xc4;}' unless defined(&WDCC_READMULTI);
    eval 'sub WDCC_WRITEMULTI () {0xc5;}' unless defined(&WDCC_WRITEMULTI);
    eval 'sub WDCC_SETMULTI () {0xc6;}' unless defined(&WDCC_SETMULTI);
    eval 'sub WDCC_READDMA () {0xc8;}' unless defined(&WDCC_READDMA);
    eval 'sub WDCC_WRITEDMA () {0xca;}' unless defined(&WDCC_WRITEDMA);
    eval 'sub WDCC_ACKMC () {0xdb;}' unless defined(&WDCC_ACKMC);
    eval 'sub WDCC_LOCK () {0xde;}' unless defined(&WDCC_LOCK);
    eval 'sub WDCC_UNLOCK () {0xdf;}' unless defined(&WDCC_UNLOCK);
    eval 'sub WDCC_FLUSHCACHE () {0xe7;}' unless defined(&WDCC_FLUSHCACHE);
    eval 'sub WDCC_IDENTIFY () {0xec;}' unless defined(&WDCC_IDENTIFY);
    eval 'sub SET_FEATURES () {0xef;}' unless defined(&SET_FEATURES);
    eval 'sub WDCC_IDLE () {0xe3;}' unless defined(&WDCC_IDLE);
    eval 'sub WDCC_IDLE_IMMED () {0xe1;}' unless defined(&WDCC_IDLE_IMMED);
    eval 'sub WDCC_SLEEP () {0xe6;}' unless defined(&WDCC_SLEEP);
    eval 'sub WDCC_STANDBY () {0xe2;}' unless defined(&WDCC_STANDBY);
    eval 'sub WDCC_STANDBY_IMMED () {0xe0;}' unless defined(&WDCC_STANDBY_IMMED);
    eval 'sub WDCC_CHECK_PWR () {0xe5;}' unless defined(&WDCC_CHECK_PWR);
    eval 'sub WDCC_READ_EXT () {0x24;}' unless defined(&WDCC_READ_EXT);
    eval 'sub WDCC_WRITE_EXT () {0x34;}' unless defined(&WDCC_WRITE_EXT);
    eval 'sub WDCC_READMULTI_EXT () {0x29;}' unless defined(&WDCC_READMULTI_EXT);
    eval 'sub WDCC_WRITEMULTI_EXT () {0x39;}' unless defined(&WDCC_WRITEMULTI_EXT);
    eval 'sub WDCC_READDMA_EXT () {0x25;}' unless defined(&WDCC_READDMA_EXT);
    eval 'sub WDCC_WRITEDMA_EXT () {0x35;}' unless defined(&WDCC_WRITEDMA_EXT);
    eval 'sub WDCC_FLUSHCACHE_EXT () {0xea;}' unless defined(&WDCC_FLUSHCACHE_EXT);
    eval 'sub WDCC_SEC_SET_PASSWORD () {0xf1;}' unless defined(&WDCC_SEC_SET_PASSWORD);
    eval 'sub WDCC_SEC_UNLOCK () {0xf2;}' unless defined(&WDCC_SEC_UNLOCK);
    eval 'sub WDCC_SEC_ERASE_PREPARE () {0xf3;}' unless defined(&WDCC_SEC_ERASE_PREPARE);
    eval 'sub WDCC_SEC_ERASE_UNIT () {0xf4;}' unless defined(&WDCC_SEC_ERASE_UNIT);
    eval 'sub WDCC_SEC_FREEZE_LOCK () {0xf5;}' unless defined(&WDCC_SEC_FREEZE_LOCK);
    eval 'sub WDCC_SEC_DISABLE_PASSWORD () {0xf6;}' unless defined(&WDCC_SEC_DISABLE_PASSWORD);
    eval 'sub WDSF_8BIT_PIO_EN () {0x1;}' unless defined(&WDSF_8BIT_PIO_EN);
    eval 'sub WDSF_EN_WR_CACHE () {0x2;}' unless defined(&WDSF_EN_WR_CACHE);
    eval 'sub WDSF_SET_MODE () {0x3;}' unless defined(&WDSF_SET_MODE);
    eval 'sub WDSF_REASSIGN_EN () {0x4;}' unless defined(&WDSF_REASSIGN_EN);
    eval 'sub WDSF_APM_EN () {0x5;}' unless defined(&WDSF_APM_EN);
    eval 'sub WDSF_PUIS_EN () {0x6;}' unless defined(&WDSF_PUIS_EN);
    eval 'sub WDSF_PUIS_SPINUP () {0x7;}' unless defined(&WDSF_PUIS_SPINUP);
    eval 'sub WDSF_CFA_MODE1_EN () {0xa;}' unless defined(&WDSF_CFA_MODE1_EN);
    eval 'sub WDSF_RMSN_DS () {0x31;}' unless defined(&WDSF_RMSN_DS);
    eval 'sub WDSF_RETRY_DS () {0x33;}' unless defined(&WDSF_RETRY_DS);
    eval 'sub WDSF_AAM_EN () {0x42;}' unless defined(&WDSF_AAM_EN);
    eval 'sub WDSF_SET_CACHE_SGMT () {0x54;}' unless defined(&WDSF_SET_CACHE_SGMT);
    eval 'sub WDSF_READAHEAD_DS () {0x55;}' unless defined(&WDSF_READAHEAD_DS);
    eval 'sub WDSF_RLSE_EN () {0x5d;}' unless defined(&WDSF_RLSE_EN);
    eval 'sub WDSF_SRV_EN () {0x5e;}' unless defined(&WDSF_SRV_EN);
    eval 'sub WDSF_POD_DS () {0x66;}' unless defined(&WDSF_POD_DS);
    eval 'sub WDSF_ECC_DS () {0x77;}' unless defined(&WDSF_ECC_DS);
    eval 'sub WDSF_8BIT_PIO_DS () {0x81;}' unless defined(&WDSF_8BIT_PIO_DS);
    eval 'sub WDSF_WRITE_CACHE_DS () {0x82;}' unless defined(&WDSF_WRITE_CACHE_DS);
    eval 'sub WDSF_REASSIGN_DS () {0x84;}' unless defined(&WDSF_REASSIGN_DS);
    eval 'sub WDSF_APM_DS () {0x85;}' unless defined(&WDSF_APM_DS);
    eval 'sub WDSF_PUIS_DS () {0x86;}' unless defined(&WDSF_PUIS_DS);
    eval 'sub WDSF_ECC_EN () {0x88;}' unless defined(&WDSF_ECC_EN);
    eval 'sub WDSF_CFA_MODE1_DS () {0x8a;}' unless defined(&WDSF_CFA_MODE1_DS);
    eval 'sub WDSF_RMSN_EN () {0x95;}' unless defined(&WDSF_RMSN_EN);
    eval 'sub WDSF_RETRY_EN () {0x99;}' unless defined(&WDSF_RETRY_EN);
    eval 'sub WDSF_SET_CURRENT () {0x9a;}' unless defined(&WDSF_SET_CURRENT);
    eval 'sub WDSF_READAHEAD_EN () {0xaa;}' unless defined(&WDSF_READAHEAD_EN);
    eval 'sub WDSF_PREFETCH_SET () {0xab;}' unless defined(&WDSF_PREFETCH_SET);
    eval 'sub WDSF_AAM_DS () {0xc2;}' unless defined(&WDSF_AAM_DS);
    eval 'sub WDSF_POD_EN () {0xcc;}' unless defined(&WDSF_POD_EN);
    eval 'sub WDSF_RLSE_DS () {0xdd;}' unless defined(&WDSF_RLSE_DS);
    eval 'sub WDSF_SRV_DS () {0xde;}' unless defined(&WDSF_SRV_DS);
    eval 'sub WDSD_IBM () {0xa0;}' unless defined(&WDSD_IBM);
    eval 'sub WDSD_CHS () {0x;}' unless defined(&WDSD_CHS);
    eval 'sub WDSD_LBA () {0x40;}' unless defined(&WDSD_LBA);
    eval 'sub ATAPI_CHECK_POWER_MODE () {0xe5;}' unless defined(&ATAPI_CHECK_POWER_MODE);
    eval 'sub ATAPI_EXEC_DRIVE_DIAGS () {0x90;}' unless defined(&ATAPI_EXEC_DRIVE_DIAGS);
    eval 'sub ATAPI_IDLE_IMMEDIATE () {0xe1;}' unless defined(&ATAPI_IDLE_IMMEDIATE);
    eval 'sub ATAPI_NOP () {0x;}' unless defined(&ATAPI_NOP);
    eval 'sub ATAPI_PKT_CMD () {0xa0;}' unless defined(&ATAPI_PKT_CMD);
    eval 'sub ATAPI_IDENTIFY_DEVICE () {0xa1;}' unless defined(&ATAPI_IDENTIFY_DEVICE);
    eval 'sub ATAPI_SOFT_RESET () {0x8;}' unless defined(&ATAPI_SOFT_RESET);
    eval 'sub ATAPI_DEVICE_RESET () {0x8;}' unless defined(&ATAPI_DEVICE_RESET);
    eval 'sub ATAPI_SLEEP () {0xe6;}' unless defined(&ATAPI_SLEEP);
    eval 'sub ATAPI_STANDBY_IMMEDIATE () {0xe0;}' unless defined(&ATAPI_STANDBY_IMMEDIATE);
    eval 'sub ATAPI_SMART () {0xb0;}' unless defined(&ATAPI_SMART);
    eval 'sub ATAPI_SETMAX () {0xf9;}' unless defined(&ATAPI_SETMAX);
    eval 'sub ATAPI_WRITEEXT () {0x34;}' unless defined(&ATAPI_WRITEEXT);
    eval 'sub ATAPI_SETMAXEXT () {0x37;}' unless defined(&ATAPI_SETMAXEXT);
    eval 'sub ATAPI_WRITEMULTIEXT () {0x39;}' unless defined(&ATAPI_WRITEMULTIEXT);
    eval 'sub ATAPI_PKT_CMD_FTRE_DMA () {0x1;}' unless defined(&ATAPI_PKT_CMD_FTRE_DMA);
    eval 'sub ATAPI_PKT_CMD_FTRE_OVL () {0x2;}' unless defined(&ATAPI_PKT_CMD_FTRE_OVL);
    eval 'sub WDCI_CMD () {0x1;}' unless defined(&WDCI_CMD);
    eval 'sub WDCI_IN () {0x2;}' unless defined(&WDCI_IN);
    eval 'sub WDCI_RELEASE () {0x4;}' unless defined(&WDCI_RELEASE);
    eval 'sub PHASE_CMDOUT () {( &WDCS_DRQ |  &WDCI_CMD);}' unless defined(&PHASE_CMDOUT);
    eval 'sub PHASE_DATAIN () {( &WDCS_DRQ |  &WDCI_IN);}' unless defined(&PHASE_DATAIN);
    eval 'sub PHASE_DATAOUT () { &WDCS_DRQ;}' unless defined(&PHASE_DATAOUT);
    eval 'sub PHASE_COMPLETED () {( &WDCI_IN |  &WDCI_CMD);}' unless defined(&PHASE_COMPLETED);
    eval 'sub PHASE_ABORTED () {0;}' unless defined(&PHASE_ABORTED);
}
1;
