require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&__MACHINE_M88110_H__)) {
    eval 'sub __MACHINE_M88110_H__ () {1;}' unless defined(&__MACHINE_M88110_H__);
    eval 'sub CMMU_ICMD () {0;}' unless defined(&CMMU_ICMD);
    eval 'sub CMMU_ICTL () {1;}' unless defined(&CMMU_ICTL);
    eval 'sub CMMU_ISAR () {2;}' unless defined(&CMMU_ISAR);
    eval 'sub CMMU_ISAP () {3;}' unless defined(&CMMU_ISAP);
    eval 'sub CMMU_IUAP () {4;}' unless defined(&CMMU_IUAP);
    eval 'sub CMMU_IIR () {5;}' unless defined(&CMMU_IIR);
    eval 'sub CMMU_IBP () {6;}' unless defined(&CMMU_IBP);
    eval 'sub CMMU_IPPU () {7;}' unless defined(&CMMU_IPPU);
    eval 'sub CMMU_IPPL () {8;}' unless defined(&CMMU_IPPL);
    eval 'sub CMMU_ISR () {9;}' unless defined(&CMMU_ISR);
    eval 'sub CMMU_ILAR () {10;}' unless defined(&CMMU_ILAR);
    eval 'sub CMMU_IPAR () {11;}' unless defined(&CMMU_IPAR);
    eval 'sub CMMU_DCMD () {12;}' unless defined(&CMMU_DCMD);
    eval 'sub CMMU_DCTL () {13;}' unless defined(&CMMU_DCTL);
    eval 'sub CMMU_DSAR () {14;}' unless defined(&CMMU_DSAR);
    eval 'sub CMMU_DSAP () {15;}' unless defined(&CMMU_DSAP);
    eval 'sub CMMU_DUAP () {16;}' unless defined(&CMMU_DUAP);
    eval 'sub CMMU_DIR () {17;}' unless defined(&CMMU_DIR);
    eval 'sub CMMU_DBP () {18;}' unless defined(&CMMU_DBP);
    eval 'sub CMMU_DPPU () {19;}' unless defined(&CMMU_DPPU);
    eval 'sub CMMU_DPPL () {20;}' unless defined(&CMMU_DPPL);
    eval 'sub CMMU_DSR () {21;}' unless defined(&CMMU_DSR);
    eval 'sub CMMU_DLAR () {22;}' unless defined(&CMMU_DLAR);
    eval 'sub CMMU_DPAR () {23;}' unless defined(&CMMU_DPAR);
    eval 'sub CMMU_ICMD_INV_ITIC () {0x1;}' unless defined(&CMMU_ICMD_INV_ITIC);
    eval 'sub CMMU_ICMD_INV_TIC () {0x2;}' unless defined(&CMMU_ICMD_INV_TIC);
    eval 'sub CMMU_ICMD_INV_LINE () {0x5;}' unless defined(&CMMU_ICMD_INV_LINE);
    eval 'sub CMMU_ICMD_PRB_SUPR () {0x8;}' unless defined(&CMMU_ICMD_PRB_SUPR);
    eval 'sub CMMU_ICMD_PRB_USER () {0x9;}' unless defined(&CMMU_ICMD_PRB_USER);
    eval 'sub CMMU_ICMD_INV_SATC () {0xa;}' unless defined(&CMMU_ICMD_INV_SATC);
    eval 'sub CMMU_ICMD_INV_UATC () {0xb;}' unless defined(&CMMU_ICMD_INV_UATC);
    eval 'sub CMMU_ICTL_DID () {0x8000;}' unless defined(&CMMU_ICTL_DID);
    eval 'sub CMMU_ICTL_PREN () {0x4000;}' unless defined(&CMMU_ICTL_PREN);
    eval 'sub CMMU_ICTL_FRZ0 () {0x100;}' unless defined(&CMMU_ICTL_FRZ0);
    eval 'sub CMMU_ICTL_FRZ1 () {0x80;}' unless defined(&CMMU_ICTL_FRZ1);
    eval 'sub CMMU_ICTL_HTEN () {0x40;}' unless defined(&CMMU_ICTL_HTEN);
    eval 'sub CMMU_ICTL_MEN () {0x20;}' unless defined(&CMMU_ICTL_MEN);
    eval 'sub CMMU_ICTL_BEN () {0x4;}' unless defined(&CMMU_ICTL_BEN);
    eval 'sub CMMU_ICTL_CEN () {0x1;}' unless defined(&CMMU_ICTL_CEN);
    eval 'sub CMMU_ISR_TBE () {0x200000;}' unless defined(&CMMU_ISR_TBE);
    eval 'sub CMMU_ISR_SI () {0x100000;}' unless defined(&CMMU_ISR_SI);
    eval 'sub CMMU_ISR_PI () {0x80000;}' unless defined(&CMMU_ISR_PI);
    eval 'sub CMMU_ISR_SP () {0x40000;}' unless defined(&CMMU_ISR_SP);
    eval 'sub CMMU_ISR_PH () {0x800;}' unless defined(&CMMU_ISR_PH);
    eval 'sub CMMU_ISR_BH () {0x400;}' unless defined(&CMMU_ISR_BH);
    eval 'sub CMMU_ISR_SU () {0x200;}' unless defined(&CMMU_ISR_SU);
    eval 'sub CMMU_ISR_BE () {0x1;}' unless defined(&CMMU_ISR_BE);
    eval 'sub CMMU_DCMD_FLUSH_PG () {0x;}' unless defined(&CMMU_DCMD_FLUSH_PG);
    eval 'sub CMMU_DCMD_INV_ALL () {0x1;}' unless defined(&CMMU_DCMD_INV_ALL);
    eval 'sub CMMU_DCMD_FLUSH_ALL () {0x2;}' unless defined(&CMMU_DCMD_FLUSH_ALL);
    eval 'sub CMMU_DCMD_FLUSH_ALL_INV () {0x3;}' unless defined(&CMMU_DCMD_FLUSH_ALL_INV);
    eval 'sub CMMU_DCMD_FLUSH_PG_INV () {0x4;}' unless defined(&CMMU_DCMD_FLUSH_PG_INV);
    eval 'sub CMMU_DCMD_INV_LINE () {0x5;}' unless defined(&CMMU_DCMD_INV_LINE);
    eval 'sub CMMU_DCMD_FLUSH_LINE () {0x6;}' unless defined(&CMMU_DCMD_FLUSH_LINE);
    eval 'sub CMMU_DCMD_FLUSH_LINE_INV () {0x7;}' unless defined(&CMMU_DCMD_FLUSH_LINE_INV);
    eval 'sub CMMU_DCMD_PRB_SUPR () {0x8;}' unless defined(&CMMU_DCMD_PRB_SUPR);
    eval 'sub CMMU_DCMD_PRB_USER () {0x9;}' unless defined(&CMMU_DCMD_PRB_USER);
    eval 'sub CMMU_DCMD_INV_SATC () {0xa;}' unless defined(&CMMU_DCMD_INV_SATC);
    eval 'sub CMMU_DCMD_INV_UATC () {0xb;}' unless defined(&CMMU_DCMD_INV_UATC);
    eval 'sub CMMU_DCTL_RSVD7 () {0x40000;}' unless defined(&CMMU_DCTL_RSVD7);
    eval 'sub CMMU_DCTL_RSVD6 () {0x20000;}' unless defined(&CMMU_DCTL_RSVD6);
    eval 'sub CMMU_DCTL_RSVD5 () {0x10000;}' unless defined(&CMMU_DCTL_RSVD5);
    eval 'sub CMMU_DCTL_RSVD4 () {0x8000;}' unless defined(&CMMU_DCTL_RSVD4);
    eval 'sub CMMU_DCTL_RSVD3 () {0x4000;}' unless defined(&CMMU_DCTL_RSVD3);
    eval 'sub CMMU_DCTL_XMEM () {0x2000;}' unless defined(&CMMU_DCTL_XMEM);
    eval 'sub CMMU_DCTL_DEN () {0x1000;}' unless defined(&CMMU_DCTL_DEN);
    eval 'sub CMMU_DCTL_FWT () {0x800;}' unless defined(&CMMU_DCTL_FWT);
    eval 'sub CMMU_DCTL_BPEN1 () {0x400;}' unless defined(&CMMU_DCTL_BPEN1);
    eval 'sub CMMU_DCTL_BPEN0 () {0x200;}' unless defined(&CMMU_DCTL_BPEN0);
    eval 'sub CMMU_DCTL_FRZ0 () {0x100;}' unless defined(&CMMU_DCTL_FRZ0);
    eval 'sub CMMU_DCTL_FRZ1 () {0x80;}' unless defined(&CMMU_DCTL_FRZ1);
    eval 'sub CMMU_DCTL_HTEN () {0x40;}' unless defined(&CMMU_DCTL_HTEN);
    eval 'sub CMMU_DCTL_MEN () {0x20;}' unless defined(&CMMU_DCTL_MEN);
    eval 'sub CMMU_DCTL_RSVD2 () {0x10;}' unless defined(&CMMU_DCTL_RSVD2);
    eval 'sub CMMU_DCTL_ADS () {0x8;}' unless defined(&CMMU_DCTL_ADS);
    eval 'sub CMMU_DCTL_RSVD1 () {0x4;}' unless defined(&CMMU_DCTL_RSVD1);
    eval 'sub CMMU_DCTL_SEN () {0x2;}' unless defined(&CMMU_DCTL_SEN);
    eval 'sub CMMU_DCTL_CEN () {0x1;}' unless defined(&CMMU_DCTL_CEN);
    eval 'sub CMMU_DSR_TBE () {0x200000;}' unless defined(&CMMU_DSR_TBE);
    eval 'sub CMMU_DSR_SI () {0x100000;}' unless defined(&CMMU_DSR_SI);
    eval 'sub CMMU_DSR_PI () {0x80000;}' unless defined(&CMMU_DSR_PI);
    eval 'sub CMMU_DSR_SP () {0x40000;}' unless defined(&CMMU_DSR_SP);
    eval 'sub CMMU_DSR_WE () {0x20000;}' unless defined(&CMMU_DSR_WE);
    eval 'sub CMMU_DSR_BPE () {0x10000;}' unless defined(&CMMU_DSR_BPE);
    eval 'sub CMMU_DSR_PH () {0x800;}' unless defined(&CMMU_DSR_PH);
    eval 'sub CMMU_DSR_BH () {0x400;}' unless defined(&CMMU_DSR_BH);
    eval 'sub CMMU_DSR_SU () {0x200;}' unless defined(&CMMU_DSR_SU);
    eval 'sub CMMU_DSR_RW () {0x100;}' unless defined(&CMMU_DSR_RW);
    eval 'sub CMMU_DSR_CP () {0x4;}' unless defined(&CMMU_DSR_CP);
    eval 'sub CMMU_DSR_WA () {0x2;}' unless defined(&CMMU_DSR_WA);
    eval 'sub CMMU_DSR_BE () {0x1;}' unless defined(&CMMU_DSR_BE);
    eval 'sub CMMU_READ () {0;}' unless defined(&CMMU_READ);
    eval 'sub CMMU_WRITE () {1;}' unless defined(&CMMU_WRITE);
    eval 'sub CMMU_DATA () {1;}' unless defined(&CMMU_DATA);
    eval 'sub CMMU_INST () {0;}' unless defined(&CMMU_INST);
    eval 'sub BATC_512K () {(0x <<  &BATC_BLKSHIFT);}' unless defined(&BATC_512K);
    eval 'sub BATC_1M () {(0x1 <<  &BATC_BLKSHIFT);}' unless defined(&BATC_1M);
    eval 'sub BATC_2M () {(0x3 <<  &BATC_BLKSHIFT);}' unless defined(&BATC_2M);
    eval 'sub BATC_4M () {(0x7 <<  &BATC_BLKSHIFT);}' unless defined(&BATC_4M);
    eval 'sub BATC_8M () {(0xf <<  &BATC_BLKSHIFT);}' unless defined(&BATC_8M);
    eval 'sub BATC_16M () {(0x1f <<  &BATC_BLKSHIFT);}' unless defined(&BATC_16M);
    eval 'sub BATC_32M () {(0x3f <<  &BATC_BLKSHIFT);}' unless defined(&BATC_32M);
    eval 'sub BATC_64M () {(0x7f <<  &BATC_BLKSHIFT);}' unless defined(&BATC_64M);
    eval 'sub CLINE_MASK () {0x1f;}' unless defined(&CLINE_MASK);
    eval 'sub CLINE_SIZE () {(8* 32);}' unless defined(&CLINE_SIZE);
    unless(defined(&_LOCORE)) {
	eval 'sub line_addr {
	    my($x) = @_;
    	    eval q(( &paddr_t)(($x) & ~ &CLINE_MASK));
	}' unless defined(&line_addr);
	eval 'sub page_addr {
	    my($x) = @_;
    	    eval q(( &paddr_t)(($x) & ~ &PAGE_MASK));
	}' unless defined(&page_addr);
    }
}
1;
