require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_DEV_PCI_PCIIDEREG_H_)) {
    eval 'sub _DEV_PCI_PCIIDEREG_H_ () {1;}' unless defined(&_DEV_PCI_PCIIDEREG_H_);
    eval 'sub PCIIDE_NUM_CHANNELS () {2;}' unless defined(&PCIIDE_NUM_CHANNELS);
    eval 'sub PCIIDE_REG_CMD_BASE {
        my($chan) = @_;
	    eval q((0x10 + (8* ($chan))));
    }' unless defined(&PCIIDE_REG_CMD_BASE);
    eval 'sub PCIIDE_REG_CTL_BASE {
        my($chan) = @_;
	    eval q((0x14 + (8* ($chan))));
    }' unless defined(&PCIIDE_REG_CTL_BASE);
    eval 'sub PCIIDE_REG_BUS_MASTER_DMA () {0x20;}' unless defined(&PCIIDE_REG_BUS_MASTER_DMA);
    eval 'sub PCIIDE_CHANSTATUS_EN () {0x40;}' unless defined(&PCIIDE_CHANSTATUS_EN);
    eval 'sub PCIIDE_CHAN_EN {
        my($chan) = @_;
	    eval q((0x20 >> ($chan)));
    }' unless defined(&PCIIDE_CHAN_EN);
    eval 'sub PCIIDE_INTERFACE_PCI {
        my($chan) = @_;
	    eval q((0x1 << (2* ($chan))));
    }' unless defined(&PCIIDE_INTERFACE_PCI);
    eval 'sub PCIIDE_INTERFACE_SETTABLE {
        my($chan) = @_;
	    eval q((0x2 << (2* ($chan))));
    }' unless defined(&PCIIDE_INTERFACE_SETTABLE);
    eval 'sub PCIIDE_INTERFACE_BUS_MASTER_DMA () {0x80;}' unless defined(&PCIIDE_INTERFACE_BUS_MASTER_DMA);
    eval 'sub PCIIDE_COMPAT_CMD_BASE {
        my($chan) = @_;
	    eval q((($chan) == 0? 0x1f0 : 0x170));
    }' unless defined(&PCIIDE_COMPAT_CMD_BASE);
    eval 'sub PCIIDE_COMPAT_CMD_SIZE () {8;}' unless defined(&PCIIDE_COMPAT_CMD_SIZE);
    eval 'sub PCIIDE_COMPAT_CTL_BASE {
        my($chan) = @_;
	    eval q((($chan) == 0? 0x3f6 : 0x376));
    }' unless defined(&PCIIDE_COMPAT_CTL_BASE);
    eval 'sub PCIIDE_COMPAT_CTL_SIZE () {1;}' unless defined(&PCIIDE_COMPAT_CTL_SIZE);
    eval 'sub PCIIDE_COMPAT_IRQ {
        my($chan) = @_;
	    eval q((($chan) == 0? 14: 15));
    }' unless defined(&PCIIDE_COMPAT_IRQ);
    eval 'sub PCIIDE_CHANNEL_NAME {
        my($chan) = @_;
	    eval q((($chan) == 0? \\"channel 0\\" : \\"channel 1\\"));
    }' unless defined(&PCIIDE_CHANNEL_NAME);
    eval 'sub IDEDMA_SCH_OFFSET () {0x8;}' unless defined(&IDEDMA_SCH_OFFSET);
    eval 'sub IDEDMA_NREGS () {8;}' unless defined(&IDEDMA_NREGS);
    eval 'sub IDEDMA_CMD {
        my($chan) = @_;
	    eval q((0x +  &IDEDMA_SCH_OFFSET * ($chan)));
    }' unless defined(&IDEDMA_CMD);
    eval 'sub IDEDMA_CMD_WRITE () {0x8;}' unless defined(&IDEDMA_CMD_WRITE);
    eval 'sub IDEDMA_CMD_START () {0x1;}' unless defined(&IDEDMA_CMD_START);
    eval 'sub IDEDMA_CTL {
        my($chan) = @_;
	    eval q((0x2 +  &IDEDMA_SCH_OFFSET * ($chan)));
    }' unless defined(&IDEDMA_CTL);
    eval 'sub IDEDMA_CTL_DRV_DMA {
        my($d) = @_;
	    eval q((0x20 << ($d)));
    }' unless defined(&IDEDMA_CTL_DRV_DMA);
    eval 'sub IDEDMA_CTL_INTR () {0x4;}' unless defined(&IDEDMA_CTL_INTR);
    eval 'sub IDEDMA_CTL_ERR () {0x2;}' unless defined(&IDEDMA_CTL_ERR);
    eval 'sub IDEDMA_CTL_ACT () {0x1;}' unless defined(&IDEDMA_CTL_ACT);
    eval 'sub IDEDMA_TBL {
        my($chan) = @_;
	    eval q((0x4 +  &IDEDMA_SCH_OFFSET * ($chan)));
    }' unless defined(&IDEDMA_TBL);
    eval 'sub IDEDMA_TBL_MASK () {0xfffffffc;}' unless defined(&IDEDMA_TBL_MASK);
    eval 'sub IDEDMA_TBL_ALIGN () {0x10000;}' unless defined(&IDEDMA_TBL_ALIGN);
    eval 'sub IDEDMA_BYTE_COUNT_MASK () {0xffff;}' unless defined(&IDEDMA_BYTE_COUNT_MASK);
    eval 'sub IDEDMA_BYTE_COUNT_EOT () {0x80000000;}' unless defined(&IDEDMA_BYTE_COUNT_EOT);
    eval 'sub IDEDMA_BYTE_COUNT_MAX () {0x10000;}' unless defined(&IDEDMA_BYTE_COUNT_MAX);
    eval 'sub IDEDMA_BYTE_COUNT_ALIGN () {0x10000;}' unless defined(&IDEDMA_BYTE_COUNT_ALIGN);
    eval 'sub NIDEDMA_TABLES () {( &MAXPHYS/ &PAGE_SIZE + 1);}' unless defined(&NIDEDMA_TABLES);
}
1;
