require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_DEV_IC_RF3000REG_H_)) {
    eval 'sub _DEV_IC_RF3000REG_H_ () {1;}' unless defined(&_DEV_IC_RF3000REG_H_);
    eval 'sub RF3000_TWI_DATA_MASK () {0xff;}' unless defined(&RF3000_TWI_DATA_MASK);
    eval 'sub RF3000_TWI_ADDR_MASK () {0x7f;}' unless defined(&RF3000_TWI_ADDR_MASK);
    eval 'sub RF3000_TWI_AI () {0x80;}' unless defined(&RF3000_TWI_AI);
    eval 'sub RF3000_CTL () {0x1;}' unless defined(&RF3000_CTL);
    eval 'sub RF3000_CTL_MODE_MASK () { &BITS(7, 4);}' unless defined(&RF3000_CTL_MODE_MASK);
    eval 'sub RF3000_CTL_MODE_1MBPS () {0;}' unless defined(&RF3000_CTL_MODE_1MBPS);
    eval 'sub RF3000_CTL_MODE_RSVD0 () {1;}' unless defined(&RF3000_CTL_MODE_RSVD0);
    eval 'sub RF3000_CTL_MODE_2MBPS () {2;}' unless defined(&RF3000_CTL_MODE_2MBPS);
    eval 'sub RF3000_CTL_MODE_2MBPS_SHORT () {3;}' unless defined(&RF3000_CTL_MODE_2MBPS_SHORT);
    eval 'sub RF3000_CTL_MODE_5MBPS () {4;}' unless defined(&RF3000_CTL_MODE_5MBPS);
    eval 'sub RF3000_CTL_MODE_5MBPS_SHORT () {5;}' unless defined(&RF3000_CTL_MODE_5MBPS_SHORT);
    eval 'sub RF3000_CTL_MODE_11MBPS () {6;}' unless defined(&RF3000_CTL_MODE_11MBPS);
    eval 'sub RF3000_CTL_MODE_11MBPS_SHORT () {7;}' unless defined(&RF3000_CTL_MODE_11MBPS_SHORT);
    eval 'sub RF3000_CTL_MODE_BPSK () {8;}' unless defined(&RF3000_CTL_MODE_BPSK);
    eval 'sub RF3000_CTL_MODE_QPSK () {9;}' unless defined(&RF3000_CTL_MODE_QPSK);
    eval 'sub RF3000_CTL_MODE_RSVD1 () {10;}' unless defined(&RF3000_CTL_MODE_RSVD1);
    eval 'sub RF3000_CTL_MODE_RSVD2 () {11;}' unless defined(&RF3000_CTL_MODE_RSVD2);
    eval 'sub RF3000_RXSTAT () { &RF3000_CTL;}' unless defined(&RF3000_RXSTAT);
    eval 'sub RF3000_RXSTAT_SHORTPRE () { &BIT(3);}' unless defined(&RF3000_RXSTAT_SHORTPRE);
    eval 'sub RF3000_RXSTAT_ACQ () { &BIT(2);}' unless defined(&RF3000_RXSTAT_ACQ);
    eval 'sub RF3000_RXSTAT_SFD () { &BIT(1);}' unless defined(&RF3000_RXSTAT_SFD);
    eval 'sub RF3000_RXSTAT_CRC () { &BIT(0);}' unless defined(&RF3000_RXSTAT_CRC);
    eval 'sub RF3000_CCACTL () {0x2;}' unless defined(&RF3000_CCACTL);
    eval 'sub RF3000_CCACTL_MODE_MASK () { &BITS(7, 6);}' unless defined(&RF3000_CCACTL_MODE_MASK);
    eval 'sub RF3000_CCACTL_MODE_RSSIT () {0;}' unless defined(&RF3000_CCACTL_MODE_RSSIT);
    eval 'sub RF3000_CCACTL_MODE_ACQ () {1;}' unless defined(&RF3000_CCACTL_MODE_ACQ);
    eval 'sub RF3000_CCACTL_MODE_BOTH () {2;}' unless defined(&RF3000_CCACTL_MODE_BOTH);
    eval 'sub RF3000_CCACTL_RSSIT_MASK () { &BITS(5, 0);}' unless defined(&RF3000_CCACTL_RSSIT_MASK);
    eval 'sub RF3000_DIVCTL () {0x3;}' unless defined(&RF3000_DIVCTL);
    eval 'sub RF3000_DIVCTL_ENABLE () { &BIT(7);}' unless defined(&RF3000_DIVCTL_ENABLE);
    eval 'sub RF3000_DIVCTL_ANTSEL () { &BIT(6);}' unless defined(&RF3000_DIVCTL_ANTSEL);
    eval 'sub RF3000_RSSI () { &RF3000_DIVCTL;}' unless defined(&RF3000_RSSI);
    eval 'sub RF3000_RSSI_MASK () { &BITS(5, 0);}' unless defined(&RF3000_RSSI_MASK);
    eval 'sub RF3000_GAINCTL () {0x11;}' unless defined(&RF3000_GAINCTL);
    eval 'sub RF3000_GAINCTL_TXVGC_MASK () { &BITS(7, 2);}' unless defined(&RF3000_GAINCTL_TXVGC_MASK);
    eval 'sub RF3000_GAINCTL_SCRAMBLER () { &BIT(1);}' unless defined(&RF3000_GAINCTL_SCRAMBLER);
    eval 'sub RF3000_LOGAINCAL () {0x14;}' unless defined(&RF3000_LOGAINCAL);
    eval 'sub RF3000_LOGAINCAL_CAL_MASK () { &BITS(5, 0);}' unless defined(&RF3000_LOGAINCAL_CAL_MASK);
    eval 'sub RF3000_HIGAINCAL () {0x15;}' unless defined(&RF3000_HIGAINCAL);
    eval 'sub RF3000_HIGAINCAL_CAL_MASK () { &BITS(5, 0);}' unless defined(&RF3000_HIGAINCAL_CAL_MASK);
    eval 'sub RF3000_HIGAINCAL_DSSSPAD () { &BIT(6);}' unless defined(&RF3000_HIGAINCAL_DSSSPAD);
    eval 'sub RF3000_OPTIONS1 () {0x1c;}' unless defined(&RF3000_OPTIONS1);
    eval 'sub RF3000_OPTIONS1_SAT_THRESH_SIGN () { &BIT(7);}' unless defined(&RF3000_OPTIONS1_SAT_THRESH_SIGN);
    eval 'sub RF3000_OPTIONS1_SAT_THRESH () { &BITS(6,5);}' unless defined(&RF3000_OPTIONS1_SAT_THRESH);
    eval 'sub RF3000_OPTIONS1_ALTAGC () { &BIT(4);}' unless defined(&RF3000_OPTIONS1_ALTAGC);
    eval 'sub RF3000_OPTIONS1_ALTBUS () { &BIT(3);}' unless defined(&RF3000_OPTIONS1_ALTBUS);
    eval 'sub RF3000_OPTIONS1_RESERVED0_MASK () { &BITS(2,0);}' unless defined(&RF3000_OPTIONS1_RESERVED0_MASK);
    eval 'sub RF3000_OPTIONS2 () {0x1d;}' unless defined(&RF3000_OPTIONS2);
    eval 'sub RF3000_OPTIONS2_LNAGS_DELAY () { &BIT(7);}' unless defined(&RF3000_OPTIONS2_LNAGS_DELAY);
    eval 'sub RF3000_OPTIONS2_RESERVED0_MASK () { &BITS(6,3);}' unless defined(&RF3000_OPTIONS2_RESERVED0_MASK);
    eval 'sub RF3000_OPTIONS2_RTG_THRESH () { &BIT(2);}' unless defined(&RF3000_OPTIONS2_RTG_THRESH);
    eval 'sub RF3000_OPTIONS2_RESERVED1_MASK () { &BITS(1,0);}' unless defined(&RF3000_OPTIONS2_RESERVED1_MASK);
}
1;
