require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&MC_SEC)) {
    sub MC_SEC () {	0x;}
}
unless(defined(&MC_ASEC)) {
    sub MC_ASEC () {	0x1;}
}
unless(defined(&MC_MIN)) {
    sub MC_MIN () {	0x2;}
}
unless(defined(&MC_AMIN)) {
    sub MC_AMIN () {	0x3;}
}
unless(defined(&MC_HOUR)) {
    sub MC_HOUR () {	0x4;}
}
unless(defined(&MC_AHOUR)) {
    sub MC_AHOUR () {	0x5;}
}
unless(defined(&MC_DOW)) {
    sub MC_DOW () {	0x6;}
}
unless(defined(&MC_DOM)) {
    sub MC_DOM () {	0x7;}
}
unless(defined(&MC_MONTH)) {
    sub MC_MONTH () {	0x8;}
}
unless(defined(&MC_YEAR)) {
    sub MC_YEAR () {	0x9;}
}
unless(defined(&MC_REGA)) {
    sub MC_REGA () {	0xa;}
}
unless(defined(&MC_REGA_RSMASK)) {
    sub MC_REGA_RSMASK () {	0xf;}
}
unless(defined(&MC_REGA_DVMASK)) {
    sub MC_REGA_DVMASK () {	0x70;}
}
unless(defined(&MC_REGA_UIP)) {
    sub MC_REGA_UIP () {	0x80;}
}
unless(defined(&MC_REGB)) {
    sub MC_REGB () {	0xb;}
}
unless(defined(&MC_REGB_DSE)) {
    sub MC_REGB_DSE () {	0x1;}
}
unless(defined(&MC_REGB_24HR)) {
    sub MC_REGB_24HR () {	0x2;}
}
unless(defined(&MC_REGB_BINARY)) {
    sub MC_REGB_BINARY () {	0x4;}
}
unless(defined(&MC_REGB_SQWE)) {
    sub MC_REGB_SQWE () {	0x8;}
}
unless(defined(&MC_REGB_UIE)) {
    sub MC_REGB_UIE () {	0x10;}
}
unless(defined(&MC_REGB_AIE)) {
    sub MC_REGB_AIE () {	0x20;}
}
unless(defined(&MC_REGB_PIE)) {
    sub MC_REGB_PIE () {	0x40;}
}
unless(defined(&MC_REGB_SET)) {
    sub MC_REGB_SET () {	0x80;}
}
unless(defined(&MC_REGC)) {
    sub MC_REGC () {	0xc;}
}
unless(defined(&MC_REGC_UF)) {
    sub MC_REGC_UF () {	0x10;}
}
unless(defined(&MC_REGC_AF)) {
    sub MC_REGC_AF () {	0x20;}
}
unless(defined(&MC_REGC_PF)) {
    sub MC_REGC_PF () {	0x40;}
}
unless(defined(&MC_REGC_IRQF)) {
    sub MC_REGC_IRQF () {	0x80;}
}
unless(defined(&MC_REGD)) {
    sub MC_REGD () {	0xd;}
}
unless(defined(&MC_REGD_VRT)) {
    sub MC_REGD_VRT () {	0x80;}
}
unless(defined(&MC_NREGS)) {
    sub MC_NREGS () {	0xe;}
}
unless(defined(&MC_NTODREGS)) {
    sub MC_NTODREGS () {	0xa;}
}
unless(defined(&MC_NVRAM_START)) {
    sub MC_NVRAM_START () {	0xe;}
}
unless(defined(&MC_NVRAM_SIZE)) {
    sub MC_NVRAM_SIZE () {	50;}
}
unless(defined(&MC_RATE_NONE)) {
    sub MC_RATE_NONE () {	0x;}
}
unless(defined(&MC_RATE_1)) {
    sub MC_RATE_1 () {	0x1;}
}
unless(defined(&MC_RATE_2)) {
    sub MC_RATE_2 () {	0x2;}
}
unless(defined(&MC_RATE_8192_Hz)) {
    sub MC_RATE_8192_Hz () {	0x3;}
}
unless(defined(&MC_RATE_4096_Hz)) {
    sub MC_RATE_4096_Hz () {	0x4;}
}
unless(defined(&MC_RATE_2048_Hz)) {
    sub MC_RATE_2048_Hz () {	0x5;}
}
unless(defined(&MC_RATE_1024_Hz)) {
    sub MC_RATE_1024_Hz () {	0x6;}
}
unless(defined(&MC_RATE_512_Hz)) {
    sub MC_RATE_512_Hz () {	0x7;}
}
unless(defined(&MC_RATE_256_Hz)) {
    sub MC_RATE_256_Hz () {	0x8;}
}
unless(defined(&MC_RATE_128_Hz)) {
    sub MC_RATE_128_Hz () {	0x9;}
}
unless(defined(&MC_RATE_64_Hz)) {
    sub MC_RATE_64_Hz () {	0xa;}
}
unless(defined(&MC_RATE_32_Hz)) {
    sub MC_RATE_32_Hz () {	0xb;}
}
unless(defined(&MC_RATE_16_Hz)) {
    sub MC_RATE_16_Hz () {	0xc;}
}
unless(defined(&MC_RATE_8_Hz)) {
    sub MC_RATE_8_Hz () {	0xd;}
}
unless(defined(&MC_RATE_4_Hz)) {
    sub MC_RATE_4_Hz () {	0xe;}
}
unless(defined(&MC_RATE_2_Hz)) {
    sub MC_RATE_2_Hz () {	0xf;}
}
unless(defined(&MC_BASE_4_MHz)) {
    sub MC_BASE_4_MHz () {	0x;}
}
unless(defined(&MC_BASE_1_MHz)) {
    sub MC_BASE_1_MHz () {	0x10;}
}
unless(defined(&MC_BASE_32_KHz)) {
    sub MC_BASE_32_KHz () {	0x20;}
}
unless(defined(&MC_BASE_NONE)) {
    sub MC_BASE_NONE () {	0x60;}
}
unless(defined(&MC_BASE_RESET)) {
    sub MC_BASE_RESET () {	0x70;}
}
unless(defined(&_LOCORE)) {
    eval 'sub MC146818_GETTOD {
        my($sc, $regs) = @_;
	    eval q( &do { \'int\'  &i;  &while ( &mc146818_read($sc,  &MC_REGA) &  &MC_REGA_UIP) ;  &for ( &i = 0;  &i <  &MC_NTODREGS;  &i++) (*$regs)[ &i] =  &mc146818_read($sc,  &i); }  &while (0););
    }' unless defined(&MC146818_GETTOD);
    eval 'sub MC146818_PUTTOD {
        my($sc, $regs) = @_;
	    eval q( &do { \'int\'  &i;  &mc146818_write($sc,  &MC_REGB,  &mc146818_read($sc,  &MC_REGB) |  &MC_REGB_SET);  &for ( &i = 0;  &i <  &MC_NTODREGS;  &i++)  &mc146818_write($sc,  &i, (*$regs)[ &i]);  &mc146818_write($sc,  &MC_REGB,  &mc146818_read($sc,  &MC_REGB) & ~ &MC_REGB_SET); }  &while (0););
    }' unless defined(&MC146818_PUTTOD);
}
1;
