require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_DEV_ATA_ATAREG_H_)) {
    eval 'sub _DEV_ATA_ATAREG_H_ () {1;}' unless defined(&_DEV_ATA_ATAREG_H_);
    eval 'sub WDC_CFG_ATAPI_MASK () {0xc000;}' unless defined(&WDC_CFG_ATAPI_MASK);
    eval 'sub WDC_CFG_ATAPI () {0x8000;}' unless defined(&WDC_CFG_ATAPI);
    eval 'sub ATA_CFG_REMOVABLE () {0x80;}' unless defined(&ATA_CFG_REMOVABLE);
    eval 'sub ATA_CFG_FIXED () {0x40;}' unless defined(&ATA_CFG_FIXED);
    eval 'sub ATAPI_CFG_TYPE_MASK () {0x1f00;}' unless defined(&ATAPI_CFG_TYPE_MASK);
    eval 'sub ATAPI_CFG_TYPE {
        my($x) = @_;
	    eval q(((($x) &  &ATAPI_CFG_TYPE_MASK) >> 8));
    }' unless defined(&ATAPI_CFG_TYPE);
    eval 'sub ATAPI_CFG_TYPE_DIRECT () {0x;}' unless defined(&ATAPI_CFG_TYPE_DIRECT);
    eval 'sub ATAPI_CFG_TYPE_SEQUENTIAL () {0x1;}' unless defined(&ATAPI_CFG_TYPE_SEQUENTIAL);
    eval 'sub ATAPI_CFG_TYPE_CDROM () {0x5;}' unless defined(&ATAPI_CFG_TYPE_CDROM);
    eval 'sub ATAPI_CFG_TYPE_OPTICAL () {0x7;}' unless defined(&ATAPI_CFG_TYPE_OPTICAL);
    eval 'sub ATAPI_CFG_TYPE_NODEVICE () {0x1f;}' unless defined(&ATAPI_CFG_TYPE_NODEVICE);
    eval 'sub ATAPI_CFG_REMOV () {0x80;}' unless defined(&ATAPI_CFG_REMOV);
    eval 'sub ATAPI_CFG_DRQ_MASK () {0x60;}' unless defined(&ATAPI_CFG_DRQ_MASK);
    eval 'sub ATAPI_CFG_STD_DRQ () {0x;}' unless defined(&ATAPI_CFG_STD_DRQ);
    eval 'sub ATAPI_CFG_IRQ_DRQ () {0x20;}' unless defined(&ATAPI_CFG_IRQ_DRQ);
    eval 'sub ATAPI_CFG_ACCEL_DRQ () {0x40;}' unless defined(&ATAPI_CFG_ACCEL_DRQ);
    eval 'sub ATAPI_CFG_CMD_MASK () {0x3;}' unless defined(&ATAPI_CFG_CMD_MASK);
    eval 'sub ATAPI_CFG_CMD_12 () {0x;}' unless defined(&ATAPI_CFG_CMD_12);
    eval 'sub ATAPI_CFG_CMD_16 () {0x1;}' unless defined(&ATAPI_CFG_CMD_16);
    eval 'sub WDC_CAP_IORDY () {0x800;}' unless defined(&WDC_CAP_IORDY);
    eval 'sub WDC_CAP_IORDY_DSBL () {0x400;}' unless defined(&WDC_CAP_IORDY_DSBL);
    eval 'sub WDC_CAP_LBA () {0x200;}' unless defined(&WDC_CAP_LBA);
    eval 'sub WDC_CAP_DMA () {0x100;}' unless defined(&WDC_CAP_DMA);
    eval 'sub ATA_CAP_STBY () {0x2000;}' unless defined(&ATA_CAP_STBY);
    eval 'sub ATAPI_CAP_INTERL_DMA () {0x8000;}' unless defined(&ATAPI_CAP_INTERL_DMA);
    eval 'sub ATAPI_CAP_CMD_QUEUE () {0x4000;}' unless defined(&ATAPI_CAP_CMD_QUEUE);
    eval 'sub ATAPI_CAP_OVERLP () {0x2000;}' unless defined(&ATAPI_CAP_OVERLP);
    eval 'sub ATAPI_CAP_ATA_RST () {0x1000;}' unless defined(&ATAPI_CAP_ATA_RST);
    if((defined(&BYTE_ORDER) ? &BYTE_ORDER : 0) == (defined(&LITTLE_ENDIAN) ? &LITTLE_ENDIAN : 0)) {
    } else {
    }
    eval 'sub WDC_EXT_UDMA_MODES () {0x4;}' unless defined(&WDC_EXT_UDMA_MODES);
    eval 'sub WDC_EXT_MODES () {0x2;}' unless defined(&WDC_EXT_MODES);
    eval 'sub WDC_EXT_GEOM () {0x1;}' unless defined(&WDC_EXT_GEOM);
    eval 'sub WDC_MULTI_VALID () {0x100;}' unless defined(&WDC_MULTI_VALID);
    eval 'sub WDC_MULTI_MASK () {0xff;}' unless defined(&WDC_MULTI_MASK);
    if((defined(&BYTE_ORDER) ? &BYTE_ORDER : 0) == (defined(&LITTLE_ENDIAN) ? &LITTLE_ENDIAN : 0)) {
    } else {
    }
    eval 'sub WDC_QUEUE_DEPTH_MASK () {0x1f;}' unless defined(&WDC_QUEUE_DEPTH_MASK);
    eval 'sub SATA_SIGNAL_GEN1 () {0x2;}' unless defined(&SATA_SIGNAL_GEN1);
    eval 'sub SATA_SIGNAL_GEN2 () {0x4;}' unless defined(&SATA_SIGNAL_GEN2);
    eval 'sub SATA_NATIVE_CMDQ () {0x100;}' unless defined(&SATA_NATIVE_CMDQ);
    eval 'sub SATA_HOST_PWR_MGMT () {0x200;}' unless defined(&SATA_HOST_PWR_MGMT);
    eval 'sub SATA_NONZERO_OFFSETS () {0x2;}' unless defined(&SATA_NONZERO_OFFSETS);
    eval 'sub SATA_DMA_SETUP_AUTO () {0x4;}' unless defined(&SATA_DMA_SETUP_AUTO);
    eval 'sub SATA_DRIVE_PWR_MGMT () {0x8;}' unless defined(&SATA_DRIVE_PWR_MGMT);
    eval 'sub WDC_VER_ATA1 () {0x2;}' unless defined(&WDC_VER_ATA1);
    eval 'sub WDC_VER_ATA2 () {0x4;}' unless defined(&WDC_VER_ATA2);
    eval 'sub WDC_VER_ATA3 () {0x8;}' unless defined(&WDC_VER_ATA3);
    eval 'sub WDC_VER_ATA4 () {0x10;}' unless defined(&WDC_VER_ATA4);
    eval 'sub WDC_VER_ATA5 () {0x20;}' unless defined(&WDC_VER_ATA5);
    eval 'sub WDC_VER_ATA6 () {0x40;}' unless defined(&WDC_VER_ATA6);
    eval 'sub WDC_VER_ATA7 () {0x80;}' unless defined(&WDC_VER_ATA7);
    eval 'sub WDC_VER_ATA8 () {0x100;}' unless defined(&WDC_VER_ATA8);
    eval 'sub WDC_VER_ATA9 () {0x200;}' unless defined(&WDC_VER_ATA9);
    eval 'sub WDC_VER_ATA10 () {0x400;}' unless defined(&WDC_VER_ATA10);
    eval 'sub WDC_VER_ATA11 () {0x800;}' unless defined(&WDC_VER_ATA11);
    eval 'sub WDC_VER_ATA12 () {0x1000;}' unless defined(&WDC_VER_ATA12);
    eval 'sub WDC_VER_ATA13 () {0x2000;}' unless defined(&WDC_VER_ATA13);
    eval 'sub WDC_VER_ATA14 () {0x4000;}' unless defined(&WDC_VER_ATA14);
    eval 'sub WDC_CMD1_NOP () {0x4000;}' unless defined(&WDC_CMD1_NOP);
    eval 'sub WDC_CMD1_RB () {0x2000;}' unless defined(&WDC_CMD1_RB);
    eval 'sub WDC_CMD1_WB () {0x1000;}' unless defined(&WDC_CMD1_WB);
    eval 'sub WDC_CMD1_HPA () {0x400;}' unless defined(&WDC_CMD1_HPA);
    eval 'sub WDC_CMD1_DVRST () {0x200;}' unless defined(&WDC_CMD1_DVRST);
    eval 'sub WDC_CMD1_SRV () {0x100;}' unless defined(&WDC_CMD1_SRV);
    eval 'sub WDC_CMD1_RLSE () {0x80;}' unless defined(&WDC_CMD1_RLSE);
    eval 'sub WDC_CMD1_AHEAD () {0x40;}' unless defined(&WDC_CMD1_AHEAD);
    eval 'sub WDC_CMD1_CACHE () {0x20;}' unless defined(&WDC_CMD1_CACHE);
    eval 'sub WDC_CMD1_PKT () {0x10;}' unless defined(&WDC_CMD1_PKT);
    eval 'sub WDC_CMD1_PM () {0x8;}' unless defined(&WDC_CMD1_PM);
    eval 'sub WDC_CMD1_REMOV () {0x4;}' unless defined(&WDC_CMD1_REMOV);
    eval 'sub WDC_CMD1_SEC () {0x2;}' unless defined(&WDC_CMD1_SEC);
    eval 'sub WDC_CMD1_SMART () {0x1;}' unless defined(&WDC_CMD1_SMART);
    eval 'sub ATAPI_CMD2_FCE () {0x2000;}' unless defined(&ATAPI_CMD2_FCE);
    eval 'sub ATAPI_CMD2_FC () {0x1000;}' unless defined(&ATAPI_CMD2_FC);
    eval 'sub ATAPI_CMD2_DCO () {0x800;}' unless defined(&ATAPI_CMD2_DCO);
    eval 'sub ATAPI_CMD2_48AD () {0x400;}' unless defined(&ATAPI_CMD2_48AD);
    eval 'sub ATAPI_CMD2_AAM () {0x200;}' unless defined(&ATAPI_CMD2_AAM);
    eval 'sub ATAPI_CMD2_SM () {0x100;}' unless defined(&ATAPI_CMD2_SM);
    eval 'sub ATAPI_CMD2_SF () {0x40;}' unless defined(&ATAPI_CMD2_SF);
    eval 'sub ATAPI_CMD2_PUIS () {0x20;}' unless defined(&ATAPI_CMD2_PUIS);
    eval 'sub WDC_CMD2_RMSN () {0x10;}' unless defined(&WDC_CMD2_RMSN);
    eval 'sub ATA_CMD2_APM () {0x8;}' unless defined(&ATA_CMD2_APM);
    eval 'sub ATA_CMD2_CFA () {0x4;}' unless defined(&ATA_CMD2_CFA);
    eval 'sub ATA_CMD2_RWQ () {0x2;}' unless defined(&ATA_CMD2_RWQ);
    eval 'sub WDC_CMD2_DM () {0x1;}' unless defined(&WDC_CMD2_DM);
    eval 'sub ATAPI_CMDE_IIUF () {0x2000;}' unless defined(&ATAPI_CMDE_IIUF);
    eval 'sub ATAPI_CMDE_MSER () {0x4;}' unless defined(&ATAPI_CMDE_MSER);
    eval 'sub ATAPI_CMDE_TEST () {0x2;}' unless defined(&ATAPI_CMDE_TEST);
    eval 'sub ATAPI_CMDE_SLOG () {0x1;}' unless defined(&ATAPI_CMDE_SLOG);
    if((defined(&BYTE_ORDER) ? &BYTE_ORDER : 0) == (defined(&LITTLE_ENDIAN) ? &LITTLE_ENDIAN : 0)) {
    } else {
    }
    eval 'sub ATA_HWRES_CBLID () {0x2000;}' unless defined(&ATA_HWRES_CBLID);
    eval 'sub ATA_HWRES_D1_PDIAG () {0x800;}' unless defined(&ATA_HWRES_D1_PDIAG);
    eval 'sub ATA_HWRES_D1_CSEL () {0x400;}' unless defined(&ATA_HWRES_D1_CSEL);
    eval 'sub ATA_HWRES_D1_JUMP () {0x200;}' unless defined(&ATA_HWRES_D1_JUMP);
    eval 'sub ATA_HWRES_D0_SEL () {0x40;}' unless defined(&ATA_HWRES_D0_SEL);
    eval 'sub ATA_HWRES_D0_DASP () {0x20;}' unless defined(&ATA_HWRES_D0_DASP);
    eval 'sub ATA_HWRES_D0_PDIAG () {0x10;}' unless defined(&ATA_HWRES_D0_PDIAG);
    eval 'sub ATA_HWRES_D0_DIAG () {0x8;}' unless defined(&ATA_HWRES_D0_DIAG);
    eval 'sub ATA_HWRES_D0_CSEL () {0x4;}' unless defined(&ATA_HWRES_D0_CSEL);
    eval 'sub ATA_HWRES_D0_JUMP () {0x2;}' unless defined(&ATA_HWRES_D0_JUMP);
    if((defined(&BYTE_ORDER) ? &BYTE_ORDER : 0) == (defined(&LITTLE_ENDIAN) ? &LITTLE_ENDIAN : 0)) {
    } else {
    }
    eval 'sub WDC_RMSN_SUPP_MASK () {0x3;}' unless defined(&WDC_RMSN_SUPP_MASK);
    eval 'sub WDC_RMSN_SUPP () {0x1;}' unless defined(&WDC_RMSN_SUPP);
    eval 'sub WDC_SEC_LEV_MAX () {0x100;}' unless defined(&WDC_SEC_LEV_MAX);
    eval 'sub WDC_SEC_ESE_SUPP () {0x20;}' unless defined(&WDC_SEC_ESE_SUPP);
    eval 'sub WDC_SEC_EXP () {0x10;}' unless defined(&WDC_SEC_EXP);
    eval 'sub WDC_SEC_FROZEN () {0x8;}' unless defined(&WDC_SEC_FROZEN);
    eval 'sub WDC_SEC_LOCKED () {0x4;}' unless defined(&WDC_SEC_LOCKED);
    eval 'sub WDC_SEC_EN () {0x2;}' unless defined(&WDC_SEC_EN);
    eval 'sub WDC_SEC_SUPP () {0x1;}' unless defined(&WDC_SEC_SUPP);
    eval 'sub ATAPI_CFA_MAX_MASK () {0xfff;}' unless defined(&ATAPI_CFA_MAX_MASK);
    eval 'sub ATAPI_CFA_MODE1_DIS () {0x1000;}' unless defined(&ATAPI_CFA_MODE1_DIS);
    eval 'sub ATAPI_CFA_MODE1_REQ () {0x2000;}' unless defined(&ATAPI_CFA_MODE1_REQ);
    eval 'sub ATAPI_CFA_WORD160 () {0x8000;}' unless defined(&ATAPI_CFA_WORD160);
    if((defined(&BYTE_ORDER) ? &BYTE_ORDER : 0) == (defined(&LITTLE_ENDIAN) ? &LITTLE_ENDIAN : 0)) {
    } else {
    }
}
1;
