require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_EM_HW_H_)) {
    eval 'sub _EM_HW_H_ () {1;}' unless defined(&_EM_HW_H_);
    require 'dev/pci/if_em_osdep.ph';
    eval("sub em_undefined () { 0; }") unless defined(&em_undefined);
    eval("sub em_82542_rev2_0 () { 1; }") unless defined(&em_82542_rev2_0);
    eval("sub em_82542_rev2_1 () { 2; }") unless defined(&em_82542_rev2_1);
    eval("sub em_82543 () { 3; }") unless defined(&em_82543);
    eval("sub em_82544 () { 4; }") unless defined(&em_82544);
    eval("sub em_82540 () { 5; }") unless defined(&em_82540);
    eval("sub em_82545 () { 6; }") unless defined(&em_82545);
    eval("sub em_82545_rev_3 () { 7; }") unless defined(&em_82545_rev_3);
    eval("sub em_82546 () { 8; }") unless defined(&em_82546);
    eval("sub em_82546_rev_3 () { 9; }") unless defined(&em_82546_rev_3);
    eval("sub em_82541 () { 10; }") unless defined(&em_82541);
    eval("sub em_82541_rev_2 () { 11; }") unless defined(&em_82541_rev_2);
    eval("sub em_82547 () { 12; }") unless defined(&em_82547);
    eval("sub em_82547_rev_2 () { 13; }") unless defined(&em_82547_rev_2);
    eval("sub em_82571 () { 14; }") unless defined(&em_82571);
    eval("sub em_82572 () { 15; }") unless defined(&em_82572);
    eval("sub em_82573 () { 16; }") unless defined(&em_82573);
    eval("sub em_80003es2lan () { 17; }") unless defined(&em_80003es2lan);
    eval("sub em_ich8lan () { 18; }") unless defined(&em_ich8lan);
    eval("sub em_num_macs () { 19; }") unless defined(&em_num_macs);
    eval("sub em_eeprom_uninitialized () { 0; }") unless defined(&em_eeprom_uninitialized);
    eval("sub em_eeprom_spi () { 1; }") unless defined(&em_eeprom_spi);
    eval("sub em_eeprom_microwire () { 2; }") unless defined(&em_eeprom_microwire);
    eval("sub em_eeprom_flash () { 3; }") unless defined(&em_eeprom_flash);
    eval("sub em_eeprom_ich8 () { 4; }") unless defined(&em_eeprom_ich8);
    eval("sub em_eeprom_none () { 5; }") unless defined(&em_eeprom_none);
    eval("sub em_num_eeprom_types () { 6; }") unless defined(&em_num_eeprom_types);
    eval("sub em_media_type_copper () { 0; }") unless defined(&em_media_type_copper);
    eval("sub em_media_type_fiber () { 1; }") unless defined(&em_media_type_fiber);
    eval("sub em_media_type_internal_serdes () { 2; }") unless defined(&em_media_type_internal_serdes);
    eval("sub em_num_media_types () { 3; }") unless defined(&em_num_media_types);
    eval("sub em_10_half () { 0; }") unless defined(&em_10_half);
    eval("sub em_10_full () { 1; }") unless defined(&em_10_full);
    eval("sub em_100_half () { 2; }") unless defined(&em_100_half);
    eval("sub em_100_full () { 3; }") unless defined(&em_100_full);
    eval("sub em_bus_type_unknown () { 0; }") unless defined(&em_bus_type_unknown);
    eval("sub em_bus_type_pci () { 1; }") unless defined(&em_bus_type_pci);
    eval("sub em_bus_type_pcix () { 2; }") unless defined(&em_bus_type_pcix);
    eval("sub em_bus_type_pci_express () { 3; }") unless defined(&em_bus_type_pci_express);
    eval("sub em_bus_type_reserved () { 4; }") unless defined(&em_bus_type_reserved);
    eval("sub em_bus_speed_unknown () { 0; }") unless defined(&em_bus_speed_unknown);
    eval("sub em_bus_speed_33 () { 1; }") unless defined(&em_bus_speed_33);
    eval("sub em_bus_speed_66 () { 2; }") unless defined(&em_bus_speed_66);
    eval("sub em_bus_speed_100 () { 3; }") unless defined(&em_bus_speed_100);
    eval("sub em_bus_speed_120 () { 4; }") unless defined(&em_bus_speed_120);
    eval("sub em_bus_speed_133 () { 5; }") unless defined(&em_bus_speed_133);
    eval("sub em_bus_speed_2500 () { 6; }") unless defined(&em_bus_speed_2500);
    eval("sub em_bus_speed_reserved () { 7; }") unless defined(&em_bus_speed_reserved);
    eval("sub em_bus_width_unknown () { 0; }") unless defined(&em_bus_width_unknown);
    eval("sub em_bus_width_pciex_1 () { 1; }") unless defined(&em_bus_width_pciex_1);
    eval("sub em_bus_width_pciex_2 () { 2; }") unless defined(&em_bus_width_pciex_2);
    eval("sub em_bus_width_pciex_4 () { 4; }") unless defined(&em_bus_width_pciex_4);
    eval("sub em_bus_width_32 () { 5; }") unless defined(&em_bus_width_32);
    eval("sub em_bus_width_64 () { 6; }") unless defined(&em_bus_width_64);
    eval("sub em_bus_width_reserved () { 7; }") unless defined(&em_bus_width_reserved);
    eval("sub em_cable_length_50 () { 0; }") unless defined(&em_cable_length_50);
    eval("sub em_cable_length_50_80 () { 1; }") unless defined(&em_cable_length_50_80);
    eval("sub em_cable_length_80_110 () { 2; }") unless defined(&em_cable_length_80_110);
    eval("sub em_cable_length_110_140 () { 3; }") unless defined(&em_cable_length_110_140);
    eval("sub em_cable_length_140 () { 4; }") unless defined(&em_cable_length_140);
    eval("sub em_cable_length_undefined () { 0xFF; }") unless defined(&em_cable_length_undefined);
    eval("sub em_gg_cable_length_60 () { 0; }") unless defined(&em_gg_cable_length_60);
    eval("sub em_gg_cable_length_60_115 () { 1; }") unless defined(&em_gg_cable_length_60_115);
    eval("sub em_gg_cable_length_115_150 () { 2; }") unless defined(&em_gg_cable_length_115_150);
    eval("sub em_gg_cable_length_150 () { 4; }") unless defined(&em_gg_cable_length_150);
    eval("sub em_igp_cable_length_10 () { 10; }") unless defined(&em_igp_cable_length_10);
    eval("sub em_igp_cable_length_20 () { 20; }") unless defined(&em_igp_cable_length_20);
    eval("sub em_igp_cable_length_30 () { 30; }") unless defined(&em_igp_cable_length_30);
    eval("sub em_igp_cable_length_40 () { 40; }") unless defined(&em_igp_cable_length_40);
    eval("sub em_igp_cable_length_50 () { 50; }") unless defined(&em_igp_cable_length_50);
    eval("sub em_igp_cable_length_60 () { 60; }") unless defined(&em_igp_cable_length_60);
    eval("sub em_igp_cable_length_70 () { 70; }") unless defined(&em_igp_cable_length_70);
    eval("sub em_igp_cable_length_80 () { 80; }") unless defined(&em_igp_cable_length_80);
    eval("sub em_igp_cable_length_90 () { 90; }") unless defined(&em_igp_cable_length_90);
    eval("sub em_igp_cable_length_100 () { 100; }") unless defined(&em_igp_cable_length_100);
    eval("sub em_igp_cable_length_110 () { 110; }") unless defined(&em_igp_cable_length_110);
    eval("sub em_igp_cable_length_115 () { 115; }") unless defined(&em_igp_cable_length_115);
    eval("sub em_igp_cable_length_120 () { 120; }") unless defined(&em_igp_cable_length_120);
    eval("sub em_igp_cable_length_130 () { 130; }") unless defined(&em_igp_cable_length_130);
    eval("sub em_igp_cable_length_140 () { 140; }") unless defined(&em_igp_cable_length_140);
    eval("sub em_igp_cable_length_150 () { 150; }") unless defined(&em_igp_cable_length_150);
    eval("sub em_igp_cable_length_160 () { 160; }") unless defined(&em_igp_cable_length_160);
    eval("sub em_igp_cable_length_170 () { 170; }") unless defined(&em_igp_cable_length_170);
    eval("sub em_igp_cable_length_180 () { 180; }") unless defined(&em_igp_cable_length_180);
    eval("sub em_10bt_ext_dist_enable_normal () { 0; }") unless defined(&em_10bt_ext_dist_enable_normal);
    eval("sub em_10bt_ext_dist_enable_lower () { 1; }") unless defined(&em_10bt_ext_dist_enable_lower);
    eval("sub em_10bt_ext_dist_enable_undefined () { 0xFF; }") unless defined(&em_10bt_ext_dist_enable_undefined);
    eval("sub em_rev_polarity_normal () { 0; }") unless defined(&em_rev_polarity_normal);
    eval("sub em_rev_polarity_reversed () { 1; }") unless defined(&em_rev_polarity_reversed);
    eval("sub em_rev_polarity_undefined () { 0xFF; }") unless defined(&em_rev_polarity_undefined);
    eval("sub em_downshift_normal () { 0; }") unless defined(&em_downshift_normal);
    eval("sub em_downshift_activated () { 1; }") unless defined(&em_downshift_activated);
    eval("sub em_downshift_undefined () { 0xFF; }") unless defined(&em_downshift_undefined);
    eval("sub em_smart_speed_default () { 0; }") unless defined(&em_smart_speed_default);
    eval("sub em_smart_speed_on () { 1; }") unless defined(&em_smart_speed_on);
    eval("sub em_smart_speed_off () { 2; }") unless defined(&em_smart_speed_off);
    eval("sub em_polarity_reversal_enabled () { 0; }") unless defined(&em_polarity_reversal_enabled);
    eval("sub em_polarity_reversal_disabled () { 1; }") unless defined(&em_polarity_reversal_disabled);
    eval("sub em_polarity_reversal_undefined () { 0xFF; }") unless defined(&em_polarity_reversal_undefined);
    eval("sub em_auto_x_mode_manual_mdi () { 0; }") unless defined(&em_auto_x_mode_manual_mdi);
    eval("sub em_auto_x_mode_manual_mdix () { 1; }") unless defined(&em_auto_x_mode_manual_mdix);
    eval("sub em_auto_x_mode_auto1 () { 2; }") unless defined(&em_auto_x_mode_auto1);
    eval("sub em_auto_x_mode_auto2 () { 3; }") unless defined(&em_auto_x_mode_auto2);
    eval("sub em_auto_x_mode_undefined () { 0xFF; }") unless defined(&em_auto_x_mode_undefined);
    eval("sub em_1000t_rx_status_not_ok () { 0; }") unless defined(&em_1000t_rx_status_not_ok);
    eval("sub em_1000t_rx_status_ok () { 1; }") unless defined(&em_1000t_rx_status_ok);
    eval("sub em_1000t_rx_status_undefined () { 0xFF; }") unless defined(&em_1000t_rx_status_undefined);
    eval("sub em_phy_m88 () { 0; }") unless defined(&em_phy_m88);
    eval("sub em_phy_igp () { 1; }") unless defined(&em_phy_igp);
    eval("sub em_phy_igp_2 () { 2; }") unless defined(&em_phy_igp_2);
    eval("sub em_phy_gg82563 () { 3; }") unless defined(&em_phy_gg82563);
    eval("sub em_phy_igp_3 () { 4; }") unless defined(&em_phy_igp_3);
    eval("sub em_phy_ife () { 5; }") unless defined(&em_phy_ife);
    eval("sub em_phy_undefined () { 0xFF; }") unless defined(&em_phy_undefined);
    eval("sub em_ms_hw_default () { 0; }") unless defined(&em_ms_hw_default);
    eval("sub em_ms_force_master () { 1; }") unless defined(&em_ms_force_master);
    eval("sub em_ms_force_slave () { 2; }") unless defined(&em_ms_force_slave);
    eval("sub em_ms_auto () { 3; }") unless defined(&em_ms_auto);
    eval("sub em_ffe_config_enabled () { 0; }") unless defined(&em_ffe_config_enabled);
    eval("sub em_ffe_config_active () { 1; }") unless defined(&em_ffe_config_active);
    eval("sub em_ffe_config_blocked () { 2; }") unless defined(&em_ffe_config_blocked);
    eval("sub em_dsp_config_disabled () { 0; }") unless defined(&em_dsp_config_disabled);
    eval("sub em_dsp_config_enabled () { 1; }") unless defined(&em_dsp_config_enabled);
    eval("sub em_dsp_config_activated () { 2; }") unless defined(&em_dsp_config_activated);
    eval("sub em_dsp_config_undefined () { 0xFF; }") unless defined(&em_dsp_config_undefined);
    eval 'sub E1000_HOST_IF_MAX_SIZE () {2048;}' unless defined(&E1000_HOST_IF_MAX_SIZE);
    eval("sub em_byte_align () { 0; }") unless defined(&em_byte_align);
    eval("sub em_word_align () { 1; }") unless defined(&em_word_align);
    eval("sub em_dword_align () { 2; }") unless defined(&em_dword_align);
    eval 'sub E1000_SUCCESS () {0;}' unless defined(&E1000_SUCCESS);
    eval 'sub E1000_ERR_EEPROM () {1;}' unless defined(&E1000_ERR_EEPROM);
    eval 'sub E1000_ERR_PHY () {2;}' unless defined(&E1000_ERR_PHY);
    eval 'sub E1000_ERR_CONFIG () {3;}' unless defined(&E1000_ERR_CONFIG);
    eval 'sub E1000_ERR_PARAM () {4;}' unless defined(&E1000_ERR_PARAM);
    eval 'sub E1000_ERR_MAC_TYPE () {5;}' unless defined(&E1000_ERR_MAC_TYPE);
    eval 'sub E1000_ERR_PHY_TYPE () {6;}' unless defined(&E1000_ERR_PHY_TYPE);
    eval 'sub E1000_ERR_RESET () {9;}' unless defined(&E1000_ERR_RESET);
    eval 'sub E1000_ERR_MASTER_REQUESTS_PENDING () {10;}' unless defined(&E1000_ERR_MASTER_REQUESTS_PENDING);
    eval 'sub E1000_ERR_HOST_INTERFACE_COMMAND () {11;}' unless defined(&E1000_ERR_HOST_INTERFACE_COMMAND);
    eval 'sub E1000_BLK_PHY_RESET () {12;}' unless defined(&E1000_BLK_PHY_RESET);
    eval 'sub E1000_ERR_SWFW_SYNC () {13;}' unless defined(&E1000_ERR_SWFW_SYNC);
    eval 'sub E1000_BYTE_SWAP_WORD {
        my($_value) = @_;
	    eval q((((($_value) & 0xff) << 8) | ((($_value) & 0xff00) >> 8)));
    }' unless defined(&E1000_BYTE_SWAP_WORD);
    eval 'sub E1000_MNG_DHCP_TX_PAYLOAD_CMD () {64;}' unless defined(&E1000_MNG_DHCP_TX_PAYLOAD_CMD);
    eval 'sub E1000_HI_MAX_MNG_DATA_LENGTH () {0x6f8;}' unless defined(&E1000_HI_MAX_MNG_DATA_LENGTH);
    eval 'sub E1000_MNG_DHCP_COMMAND_TIMEOUT () {10;}' unless defined(&E1000_MNG_DHCP_COMMAND_TIMEOUT);
    eval 'sub E1000_MNG_DHCP_COOKIE_OFFSET () {0x6f0;}' unless defined(&E1000_MNG_DHCP_COOKIE_OFFSET);
    eval 'sub E1000_MNG_DHCP_COOKIE_LENGTH () {0x10;}' unless defined(&E1000_MNG_DHCP_COOKIE_LENGTH);
    eval 'sub E1000_MNG_IAMT_MODE () {0x3;}' unless defined(&E1000_MNG_IAMT_MODE);
    eval 'sub E1000_MNG_ICH_IAMT_MODE () {0x2;}' unless defined(&E1000_MNG_ICH_IAMT_MODE);
    eval 'sub E1000_IAMT_SIGNATURE () {0x544d4149;}' unless defined(&E1000_IAMT_SIGNATURE);
    eval 'sub E1000_MNG_DHCP_COOKIE_STATUS_PARSING_SUPPORT () {0x1;}' unless defined(&E1000_MNG_DHCP_COOKIE_STATUS_PARSING_SUPPORT);
    eval 'sub E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT () {0x2;}' unless defined(&E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT);
    eval 'sub E1000_VFTA_ENTRY_SHIFT () {0x5;}' unless defined(&E1000_VFTA_ENTRY_SHIFT);
    eval 'sub E1000_VFTA_ENTRY_MASK () {0x7f;}' unless defined(&E1000_VFTA_ENTRY_MASK);
    eval 'sub E1000_VFTA_ENTRY_BIT_SHIFT_MASK () {0x1f;}' unless defined(&E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
    unless(defined(&E1000_READ_REG_IO)) {
	eval 'sub E1000_READ_REG_IO {
	    my($a, $reg) = @_;
    	    eval q( &em_read_reg_io(($a),  &E1000_$reg));
	}' unless defined(&E1000_READ_REG_IO);
	eval 'sub E1000_WRITE_REG_IO {
	    my($a, $reg, $val) = @_;
    	    eval q( &em_write_reg_io(($a),  &E1000_$reg, $val));
	}' unless defined(&E1000_WRITE_REG_IO);
    }
    eval 'sub E1000_DEV_ID_82542 () {0x1000;}' unless defined(&E1000_DEV_ID_82542);
    eval 'sub E1000_DEV_ID_82543GC_FIBER () {0x1001;}' unless defined(&E1000_DEV_ID_82543GC_FIBER);
    eval 'sub E1000_DEV_ID_82543GC_COPPER () {0x1004;}' unless defined(&E1000_DEV_ID_82543GC_COPPER);
    eval 'sub E1000_DEV_ID_82544EI_COPPER () {0x1008;}' unless defined(&E1000_DEV_ID_82544EI_COPPER);
    eval 'sub E1000_DEV_ID_82544EI_FIBER () {0x1009;}' unless defined(&E1000_DEV_ID_82544EI_FIBER);
    eval 'sub E1000_DEV_ID_82544GC_COPPER () {0x100c;}' unless defined(&E1000_DEV_ID_82544GC_COPPER);
    eval 'sub E1000_DEV_ID_82544GC_LOM () {0x100d;}' unless defined(&E1000_DEV_ID_82544GC_LOM);
    eval 'sub E1000_DEV_ID_82540EM () {0x100e;}' unless defined(&E1000_DEV_ID_82540EM);
    eval 'sub E1000_DEV_ID_82540EM_LOM () {0x1015;}' unless defined(&E1000_DEV_ID_82540EM_LOM);
    eval 'sub E1000_DEV_ID_82540EP_LOM () {0x1016;}' unless defined(&E1000_DEV_ID_82540EP_LOM);
    eval 'sub E1000_DEV_ID_82540EP () {0x1017;}' unless defined(&E1000_DEV_ID_82540EP);
    eval 'sub E1000_DEV_ID_82540EP_LP () {0x101e;}' unless defined(&E1000_DEV_ID_82540EP_LP);
    eval 'sub E1000_DEV_ID_82545EM_COPPER () {0x100f;}' unless defined(&E1000_DEV_ID_82545EM_COPPER);
    eval 'sub E1000_DEV_ID_82545EM_FIBER () {0x1011;}' unless defined(&E1000_DEV_ID_82545EM_FIBER);
    eval 'sub E1000_DEV_ID_82545GM_COPPER () {0x1026;}' unless defined(&E1000_DEV_ID_82545GM_COPPER);
    eval 'sub E1000_DEV_ID_82545GM_FIBER () {0x1027;}' unless defined(&E1000_DEV_ID_82545GM_FIBER);
    eval 'sub E1000_DEV_ID_82545GM_SERDES () {0x1028;}' unless defined(&E1000_DEV_ID_82545GM_SERDES);
    eval 'sub E1000_DEV_ID_82546EB_COPPER () {0x1010;}' unless defined(&E1000_DEV_ID_82546EB_COPPER);
    eval 'sub E1000_DEV_ID_82546EB_FIBER () {0x1012;}' unless defined(&E1000_DEV_ID_82546EB_FIBER);
    eval 'sub E1000_DEV_ID_82546EB_QUAD_COPPER () {0x101d;}' unless defined(&E1000_DEV_ID_82546EB_QUAD_COPPER);
    eval 'sub E1000_DEV_ID_82541EI () {0x1013;}' unless defined(&E1000_DEV_ID_82541EI);
    eval 'sub E1000_DEV_ID_82541EI_MOBILE () {0x1018;}' unless defined(&E1000_DEV_ID_82541EI_MOBILE);
    eval 'sub E1000_DEV_ID_82541ER_LOM () {0x1014;}' unless defined(&E1000_DEV_ID_82541ER_LOM);
    eval 'sub E1000_DEV_ID_82541ER () {0x1078;}' unless defined(&E1000_DEV_ID_82541ER);
    eval 'sub E1000_DEV_ID_82547GI () {0x1075;}' unless defined(&E1000_DEV_ID_82547GI);
    eval 'sub E1000_DEV_ID_82541GI () {0x1076;}' unless defined(&E1000_DEV_ID_82541GI);
    eval 'sub E1000_DEV_ID_82541GI_MOBILE () {0x1077;}' unless defined(&E1000_DEV_ID_82541GI_MOBILE);
    eval 'sub E1000_DEV_ID_82541GI_LF () {0x107c;}' unless defined(&E1000_DEV_ID_82541GI_LF);
    eval 'sub E1000_DEV_ID_82546GB_COPPER () {0x1079;}' unless defined(&E1000_DEV_ID_82546GB_COPPER);
    eval 'sub E1000_DEV_ID_82546GB_FIBER () {0x107a;}' unless defined(&E1000_DEV_ID_82546GB_FIBER);
    eval 'sub E1000_DEV_ID_82546GB_SERDES () {0x107b;}' unless defined(&E1000_DEV_ID_82546GB_SERDES);
    eval 'sub E1000_DEV_ID_82546GB_PCIE () {0x108a;}' unless defined(&E1000_DEV_ID_82546GB_PCIE);
    eval 'sub E1000_DEV_ID_82546GB_QUAD_COPPER () {0x1099;}' unless defined(&E1000_DEV_ID_82546GB_QUAD_COPPER);
    eval 'sub E1000_DEV_ID_82547EI () {0x1019;}' unless defined(&E1000_DEV_ID_82547EI);
    eval 'sub E1000_DEV_ID_82547EI_MOBILE () {0x101a;}' unless defined(&E1000_DEV_ID_82547EI_MOBILE);
    eval 'sub E1000_DEV_ID_82571EB_COPPER () {0x105e;}' unless defined(&E1000_DEV_ID_82571EB_COPPER);
    eval 'sub E1000_DEV_ID_82571EB_FIBER () {0x105f;}' unless defined(&E1000_DEV_ID_82571EB_FIBER);
    eval 'sub E1000_DEV_ID_82571EB_SERDES () {0x1060;}' unless defined(&E1000_DEV_ID_82571EB_SERDES);
    eval 'sub E1000_DEV_ID_82571EB_QUAD_COPPER () {0x10a4;}' unless defined(&E1000_DEV_ID_82571EB_QUAD_COPPER);
    eval 'sub E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE () {0x10bc;}' unless defined(&E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE);
    eval 'sub E1000_DEV_ID_82572EI_COPPER () {0x107d;}' unless defined(&E1000_DEV_ID_82572EI_COPPER);
    eval 'sub E1000_DEV_ID_82572EI_FIBER () {0x107e;}' unless defined(&E1000_DEV_ID_82572EI_FIBER);
    eval 'sub E1000_DEV_ID_82572EI_SERDES () {0x107f;}' unless defined(&E1000_DEV_ID_82572EI_SERDES);
    eval 'sub E1000_DEV_ID_82572EI () {0x10b9;}' unless defined(&E1000_DEV_ID_82572EI);
    eval 'sub E1000_DEV_ID_82573E () {0x108b;}' unless defined(&E1000_DEV_ID_82573E);
    eval 'sub E1000_DEV_ID_82573E_IAMT () {0x108c;}' unless defined(&E1000_DEV_ID_82573E_IAMT);
    eval 'sub E1000_DEV_ID_82573L () {0x109a;}' unless defined(&E1000_DEV_ID_82573L);
    eval 'sub E1000_DEV_ID_82546GB_2 () {0x109b;}' unless defined(&E1000_DEV_ID_82546GB_2);
    eval 'sub E1000_DEV_ID_82571EB_AT () {0x10a0;}' unless defined(&E1000_DEV_ID_82571EB_AT);
    eval 'sub E1000_DEV_ID_82571EB_AF () {0x10a1;}' unless defined(&E1000_DEV_ID_82571EB_AF);
    eval 'sub E1000_DEV_ID_82573L_PL_1 () {0x10b0;}' unless defined(&E1000_DEV_ID_82573L_PL_1);
    eval 'sub E1000_DEV_ID_82573V_PM () {0x10b2;}' unless defined(&E1000_DEV_ID_82573V_PM);
    eval 'sub E1000_DEV_ID_82573E_PM () {0x10b3;}' unless defined(&E1000_DEV_ID_82573E_PM);
    eval 'sub E1000_DEV_ID_82573L_PL_2 () {0x10b4;}' unless defined(&E1000_DEV_ID_82573L_PL_2);
    eval 'sub E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 () {0x10b5;}' unless defined(&E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3);
    eval 'sub E1000_DEV_ID_80003ES2LAN_COPPER_DPT () {0x1096;}' unless defined(&E1000_DEV_ID_80003ES2LAN_COPPER_DPT);
    eval 'sub E1000_DEV_ID_80003ES2LAN_SERDES_DPT () {0x1098;}' unless defined(&E1000_DEV_ID_80003ES2LAN_SERDES_DPT);
    eval 'sub E1000_DEV_ID_80003ES2LAN_COPPER_SPT () {0x10ba;}' unless defined(&E1000_DEV_ID_80003ES2LAN_COPPER_SPT);
    eval 'sub E1000_DEV_ID_80003ES2LAN_SERDES_SPT () {0x10bb;}' unless defined(&E1000_DEV_ID_80003ES2LAN_SERDES_SPT);
    eval 'sub E1000_DEV_ID_ICH8_IGP_M_AMT () {0x1049;}' unless defined(&E1000_DEV_ID_ICH8_IGP_M_AMT);
    eval 'sub E1000_DEV_ID_ICH8_IGP_AMT () {0x104a;}' unless defined(&E1000_DEV_ID_ICH8_IGP_AMT);
    eval 'sub E1000_DEV_ID_ICH8_IGP_C () {0x104b;}' unless defined(&E1000_DEV_ID_ICH8_IGP_C);
    eval 'sub E1000_DEV_ID_ICH8_IFE () {0x104c;}' unless defined(&E1000_DEV_ID_ICH8_IFE);
    eval 'sub E1000_DEV_ID_ICH8_IFE_GT () {0x10c4;}' unless defined(&E1000_DEV_ID_ICH8_IFE_GT);
    eval 'sub E1000_DEV_ID_ICH8_IFE_G () {0x10c5;}' unless defined(&E1000_DEV_ID_ICH8_IFE_G);
    eval 'sub E1000_DEV_ID_ICH8_IGP_M () {0x104d;}' unless defined(&E1000_DEV_ID_ICH8_IGP_M);
    eval 'sub NODE_ADDRESS_SIZE () {6;}' unless defined(&NODE_ADDRESS_SIZE);
    eval 'sub ETH_LENGTH_OF_ADDRESS () {6;}' unless defined(&ETH_LENGTH_OF_ADDRESS);
    eval 'sub MAC_DECODE_SIZE () {(128* 1024);}' unless defined(&MAC_DECODE_SIZE);
    eval 'sub E1000_82542_2_0_REV_ID () {2;}' unless defined(&E1000_82542_2_0_REV_ID);
    eval 'sub E1000_82542_2_1_REV_ID () {3;}' unless defined(&E1000_82542_2_1_REV_ID);
    eval 'sub E1000_REVISION_0 () {0;}' unless defined(&E1000_REVISION_0);
    eval 'sub E1000_REVISION_1 () {1;}' unless defined(&E1000_REVISION_1);
    eval 'sub E1000_REVISION_2 () {2;}' unless defined(&E1000_REVISION_2);
    eval 'sub E1000_REVISION_3 () {3;}' unless defined(&E1000_REVISION_3);
    eval 'sub SPEED_10 () {10;}' unless defined(&SPEED_10);
    eval 'sub SPEED_100 () {100;}' unless defined(&SPEED_100);
    eval 'sub SPEED_1000 () {1000;}' unless defined(&SPEED_1000);
    eval 'sub HALF_DUPLEX () {1;}' unless defined(&HALF_DUPLEX);
    eval 'sub FULL_DUPLEX () {2;}' unless defined(&FULL_DUPLEX);
    eval 'sub ENET_HEADER_SIZE () {14;}' unless defined(&ENET_HEADER_SIZE);
    eval 'sub MAXIMUM_ETHERNET_FRAME_SIZE () {1518;}' unless defined(&MAXIMUM_ETHERNET_FRAME_SIZE);
    eval 'sub MINIMUM_ETHERNET_FRAME_SIZE () {64;}' unless defined(&MINIMUM_ETHERNET_FRAME_SIZE);
    eval 'sub ETHERNET_FCS_SIZE () {4;}' unless defined(&ETHERNET_FCS_SIZE);
    eval 'sub MAXIMUM_ETHERNET_PACKET_SIZE () {( &MAXIMUM_ETHERNET_FRAME_SIZE -  &ETHERNET_FCS_SIZE);}' unless defined(&MAXIMUM_ETHERNET_PACKET_SIZE);
    eval 'sub MINIMUM_ETHERNET_PACKET_SIZE () {( &MINIMUM_ETHERNET_FRAME_SIZE -  &ETHERNET_FCS_SIZE);}' unless defined(&MINIMUM_ETHERNET_PACKET_SIZE);
    eval 'sub CRC_LENGTH () { &ETHERNET_FCS_SIZE;}' unless defined(&CRC_LENGTH);
    eval 'sub MAX_JUMBO_FRAME_SIZE () {0x3f00;}' unless defined(&MAX_JUMBO_FRAME_SIZE);
    eval 'sub VLAN_TAG_SIZE () {4;}' unless defined(&VLAN_TAG_SIZE);
    eval 'sub ETHERNET_IEEE_VLAN_TYPE () {0x8100;}' unless defined(&ETHERNET_IEEE_VLAN_TYPE);
    eval 'sub ETHERNET_IP_TYPE () {0x800;}' unless defined(&ETHERNET_IP_TYPE);
    eval 'sub ETHERNET_ARP_TYPE () {0x806;}' unless defined(&ETHERNET_ARP_TYPE);
    eval 'sub IP_PROTOCOL_TCP () {6;}' unless defined(&IP_PROTOCOL_TCP);
    eval 'sub IP_PROTOCOL_UDP () {0x11;}' unless defined(&IP_PROTOCOL_UDP);
    eval 'sub POLL_IMS_ENABLE_MASK () {(  &E1000_IMS_RXDMT0 |  &E1000_IMS_RXSEQ);}' unless defined(&POLL_IMS_ENABLE_MASK);
    eval 'sub IMS_ENABLE_MASK () {(  &E1000_IMS_RXT0 |  &E1000_IMS_TXDW |  &E1000_IMS_RXDMT0 |  &E1000_IMS_RXSEQ |  &E1000_IMS_RXO |  &E1000_IMS_LSC);}' unless defined(&IMS_ENABLE_MASK);
    eval 'sub IMS_ICH8LAN_ENABLE_MASK () {(  &E1000_IMS_DSW |  &E1000_IMS_PHYINT |  &E1000_IMS_EPRST);}' unless defined(&IMS_ICH8LAN_ENABLE_MASK);
    eval 'sub E1000_RAR_ENTRIES () {15;}' unless defined(&E1000_RAR_ENTRIES);
    eval 'sub E1000_RAR_ENTRIES_ICH8LAN () {6;}' unless defined(&E1000_RAR_ENTRIES_ICH8LAN);
    eval 'sub MIN_NUMBER_OF_DESCRIPTORS () {8;}' unless defined(&MIN_NUMBER_OF_DESCRIPTORS);
    eval 'sub MAX_NUMBER_OF_DESCRIPTORS () {0xfff8;}' unless defined(&MAX_NUMBER_OF_DESCRIPTORS);
    eval 'sub MAX_PS_BUFFERS () {4;}' unless defined(&MAX_PS_BUFFERS);
    eval 'sub E1000_RXD_STAT_DD () {0x1;}' unless defined(&E1000_RXD_STAT_DD);
    eval 'sub E1000_RXD_STAT_EOP () {0x2;}' unless defined(&E1000_RXD_STAT_EOP);
    eval 'sub E1000_RXD_STAT_IXSM () {0x4;}' unless defined(&E1000_RXD_STAT_IXSM);
    eval 'sub E1000_RXD_STAT_VP () {0x8;}' unless defined(&E1000_RXD_STAT_VP);
    eval 'sub E1000_RXD_STAT_UDPCS () {0x10;}' unless defined(&E1000_RXD_STAT_UDPCS);
    eval 'sub E1000_RXD_STAT_TCPCS () {0x20;}' unless defined(&E1000_RXD_STAT_TCPCS);
    eval 'sub E1000_RXD_STAT_IPCS () {0x40;}' unless defined(&E1000_RXD_STAT_IPCS);
    eval 'sub E1000_RXD_STAT_PIF () {0x80;}' unless defined(&E1000_RXD_STAT_PIF);
    eval 'sub E1000_RXD_STAT_IPIDV () {0x200;}' unless defined(&E1000_RXD_STAT_IPIDV);
    eval 'sub E1000_RXD_STAT_UDPV () {0x400;}' unless defined(&E1000_RXD_STAT_UDPV);
    eval 'sub E1000_RXD_STAT_ACK () {0x8000;}' unless defined(&E1000_RXD_STAT_ACK);
    eval 'sub E1000_RXD_ERR_CE () {0x1;}' unless defined(&E1000_RXD_ERR_CE);
    eval 'sub E1000_RXD_ERR_SE () {0x2;}' unless defined(&E1000_RXD_ERR_SE);
    eval 'sub E1000_RXD_ERR_SEQ () {0x4;}' unless defined(&E1000_RXD_ERR_SEQ);
    eval 'sub E1000_RXD_ERR_CXE () {0x10;}' unless defined(&E1000_RXD_ERR_CXE);
    eval 'sub E1000_RXD_ERR_TCPE () {0x20;}' unless defined(&E1000_RXD_ERR_TCPE);
    eval 'sub E1000_RXD_ERR_IPE () {0x40;}' unless defined(&E1000_RXD_ERR_IPE);
    eval 'sub E1000_RXD_ERR_RXE () {0x80;}' unless defined(&E1000_RXD_ERR_RXE);
    eval 'sub E1000_RXD_SPC_VLAN_MASK () {0xfff;}' unless defined(&E1000_RXD_SPC_VLAN_MASK);
    eval 'sub E1000_RXD_SPC_PRI_MASK () {0xe000;}' unless defined(&E1000_RXD_SPC_PRI_MASK);
    eval 'sub E1000_RXD_SPC_PRI_SHIFT () {13;}' unless defined(&E1000_RXD_SPC_PRI_SHIFT);
    eval 'sub E1000_RXD_SPC_CFI_MASK () {0x1000;}' unless defined(&E1000_RXD_SPC_CFI_MASK);
    eval 'sub E1000_RXD_SPC_CFI_SHIFT () {12;}' unless defined(&E1000_RXD_SPC_CFI_SHIFT);
    eval 'sub E1000_RXDEXT_STATERR_CE () {0x1000000;}' unless defined(&E1000_RXDEXT_STATERR_CE);
    eval 'sub E1000_RXDEXT_STATERR_SE () {0x2000000;}' unless defined(&E1000_RXDEXT_STATERR_SE);
    eval 'sub E1000_RXDEXT_STATERR_SEQ () {0x4000000;}' unless defined(&E1000_RXDEXT_STATERR_SEQ);
    eval 'sub E1000_RXDEXT_STATERR_CXE () {0x10000000;}' unless defined(&E1000_RXDEXT_STATERR_CXE);
    eval 'sub E1000_RXDEXT_STATERR_TCPE () {0x20000000;}' unless defined(&E1000_RXDEXT_STATERR_TCPE);
    eval 'sub E1000_RXDEXT_STATERR_IPE () {0x40000000;}' unless defined(&E1000_RXDEXT_STATERR_IPE);
    eval 'sub E1000_RXDEXT_STATERR_RXE () {0x80000000;}' unless defined(&E1000_RXDEXT_STATERR_RXE);
    eval 'sub E1000_RXDPS_HDRSTAT_HDRSP () {0x8000;}' unless defined(&E1000_RXDPS_HDRSTAT_HDRSP);
    eval 'sub E1000_RXDPS_HDRSTAT_HDRLEN_MASK () {0x3ff;}' unless defined(&E1000_RXDPS_HDRSTAT_HDRLEN_MASK);
    eval 'sub E1000_RXD_ERR_FRAME_ERR_MASK () {(  &E1000_RXD_ERR_CE |  &E1000_RXD_ERR_SE |  &E1000_RXD_ERR_SEQ |  &E1000_RXD_ERR_CXE |  &E1000_RXD_ERR_RXE);}' unless defined(&E1000_RXD_ERR_FRAME_ERR_MASK);
    eval 'sub E1000_RXDEXT_ERR_FRAME_ERR_MASK () {(  &E1000_RXDEXT_STATERR_CE |  &E1000_RXDEXT_STATERR_SE |  &E1000_RXDEXT_STATERR_SEQ |  &E1000_RXDEXT_STATERR_CXE |  &E1000_RXDEXT_STATERR_RXE);}' unless defined(&E1000_RXDEXT_ERR_FRAME_ERR_MASK);
    eval 'sub E1000_TXD_DTYP_D () {0x100000;}' unless defined(&E1000_TXD_DTYP_D);
    eval 'sub E1000_TXD_DTYP_C () {0x;}' unless defined(&E1000_TXD_DTYP_C);
    eval 'sub E1000_TXD_POPTS_IXSM () {0x1;}' unless defined(&E1000_TXD_POPTS_IXSM);
    eval 'sub E1000_TXD_POPTS_TXSM () {0x2;}' unless defined(&E1000_TXD_POPTS_TXSM);
    eval 'sub E1000_TXD_CMD_EOP () {0x1000000;}' unless defined(&E1000_TXD_CMD_EOP);
    eval 'sub E1000_TXD_CMD_IFCS () {0x2000000;}' unless defined(&E1000_TXD_CMD_IFCS);
    eval 'sub E1000_TXD_CMD_IC () {0x4000000;}' unless defined(&E1000_TXD_CMD_IC);
    eval 'sub E1000_TXD_CMD_RS () {0x8000000;}' unless defined(&E1000_TXD_CMD_RS);
    eval 'sub E1000_TXD_CMD_RPS () {0x10000000;}' unless defined(&E1000_TXD_CMD_RPS);
    eval 'sub E1000_TXD_CMD_DEXT () {0x20000000;}' unless defined(&E1000_TXD_CMD_DEXT);
    eval 'sub E1000_TXD_CMD_VLE () {0x40000000;}' unless defined(&E1000_TXD_CMD_VLE);
    eval 'sub E1000_TXD_CMD_IDE () {0x80000000;}' unless defined(&E1000_TXD_CMD_IDE);
    eval 'sub E1000_TXD_STAT_DD () {0x1;}' unless defined(&E1000_TXD_STAT_DD);
    eval 'sub E1000_TXD_STAT_EC () {0x2;}' unless defined(&E1000_TXD_STAT_EC);
    eval 'sub E1000_TXD_STAT_LC () {0x4;}' unless defined(&E1000_TXD_STAT_LC);
    eval 'sub E1000_TXD_STAT_TU () {0x8;}' unless defined(&E1000_TXD_STAT_TU);
    eval 'sub E1000_TXD_CMD_TCP () {0x1000000;}' unless defined(&E1000_TXD_CMD_TCP);
    eval 'sub E1000_TXD_CMD_IP () {0x2000000;}' unless defined(&E1000_TXD_CMD_IP);
    eval 'sub E1000_TXD_CMD_TSE () {0x4000000;}' unless defined(&E1000_TXD_CMD_TSE);
    eval 'sub E1000_TXD_STAT_TC () {0x4;}' unless defined(&E1000_TXD_STAT_TC);
    eval 'sub E1000_NUM_UNICAST () {16;}' unless defined(&E1000_NUM_UNICAST);
    eval 'sub E1000_MC_TBL_SIZE () {128;}' unless defined(&E1000_MC_TBL_SIZE);
    eval 'sub E1000_VLAN_FILTER_TBL_SIZE () {128;}' unless defined(&E1000_VLAN_FILTER_TBL_SIZE);
    eval 'sub E1000_NUM_UNICAST_ICH8LAN () {7;}' unless defined(&E1000_NUM_UNICAST_ICH8LAN);
    eval 'sub E1000_MC_TBL_SIZE_ICH8LAN () {32;}' unless defined(&E1000_MC_TBL_SIZE_ICH8LAN);
    eval 'sub E1000_NUM_MTA_REGISTERS () {128;}' unless defined(&E1000_NUM_MTA_REGISTERS);
    eval 'sub E1000_NUM_MTA_REGISTERS_ICH8LAN () {32;}' unless defined(&E1000_NUM_MTA_REGISTERS_ICH8LAN);
    eval 'sub E1000_WAKEUP_IP_ADDRESS_COUNT_MAX () {4;}' unless defined(&E1000_WAKEUP_IP_ADDRESS_COUNT_MAX);
    eval 'sub E1000_IP4AT_SIZE () { &E1000_WAKEUP_IP_ADDRESS_COUNT_MAX;}' unless defined(&E1000_IP4AT_SIZE);
    eval 'sub E1000_IP4AT_SIZE_ICH8LAN () {3;}' unless defined(&E1000_IP4AT_SIZE_ICH8LAN);
    eval 'sub E1000_IP6AT_SIZE () {1;}' unless defined(&E1000_IP6AT_SIZE);
    eval 'sub E1000_FLEXIBLE_FILTER_COUNT_MAX () {4;}' unless defined(&E1000_FLEXIBLE_FILTER_COUNT_MAX);
    eval 'sub E1000_FLEXIBLE_FILTER_SIZE_MAX () {128;}' unless defined(&E1000_FLEXIBLE_FILTER_SIZE_MAX);
    eval 'sub E1000_FFLT_SIZE () { &E1000_FLEXIBLE_FILTER_COUNT_MAX;}' unless defined(&E1000_FFLT_SIZE);
    eval 'sub E1000_FFMT_SIZE () { &E1000_FLEXIBLE_FILTER_SIZE_MAX;}' unless defined(&E1000_FFMT_SIZE);
    eval 'sub E1000_FFVT_SIZE () { &E1000_FLEXIBLE_FILTER_SIZE_MAX;}' unless defined(&E1000_FFVT_SIZE);
    eval 'sub E1000_DISABLE_SERDES_LOOPBACK () {0x400;}' unless defined(&E1000_DISABLE_SERDES_LOOPBACK);
    eval 'sub E1000_CTRL () {0x;}' unless defined(&E1000_CTRL);
    eval 'sub E1000_CTRL_DUP () {0x4;}' unless defined(&E1000_CTRL_DUP);
    eval 'sub E1000_STATUS () {0x8;}' unless defined(&E1000_STATUS);
    eval 'sub E1000_EECD () {0x10;}' unless defined(&E1000_EECD);
    eval 'sub E1000_EERD () {0x14;}' unless defined(&E1000_EERD);
    eval 'sub E1000_CTRL_EXT () {0x18;}' unless defined(&E1000_CTRL_EXT);
    eval 'sub E1000_FLA () {0x1c;}' unless defined(&E1000_FLA);
    eval 'sub E1000_MDIC () {0x20;}' unless defined(&E1000_MDIC);
    eval 'sub E1000_SCTL () {0x24;}' unless defined(&E1000_SCTL);
    eval 'sub E1000_FEXTNVM () {0x28;}' unless defined(&E1000_FEXTNVM);
    eval 'sub E1000_FCAL () {0x28;}' unless defined(&E1000_FCAL);
    eval 'sub E1000_FCAH () {0x2c;}' unless defined(&E1000_FCAH);
    eval 'sub E1000_FCT () {0x30;}' unless defined(&E1000_FCT);
    eval 'sub E1000_VET () {0x38;}' unless defined(&E1000_VET);
    eval 'sub E1000_ICR () {0xc0;}' unless defined(&E1000_ICR);
    eval 'sub E1000_ITR () {0xc4;}' unless defined(&E1000_ITR);
    eval 'sub E1000_ICS () {0xc8;}' unless defined(&E1000_ICS);
    eval 'sub E1000_IMS () {0xd0;}' unless defined(&E1000_IMS);
    eval 'sub E1000_IMC () {0xd8;}' unless defined(&E1000_IMC);
    eval 'sub E1000_IAM () {0xe0;}' unless defined(&E1000_IAM);
    eval 'sub E1000_RCTL () {0x100;}' unless defined(&E1000_RCTL);
    eval 'sub E1000_RDTR1 () {0x2820;}' unless defined(&E1000_RDTR1);
    eval 'sub E1000_RDBAL1 () {0x2900;}' unless defined(&E1000_RDBAL1);
    eval 'sub E1000_RDBAH1 () {0x2904;}' unless defined(&E1000_RDBAH1);
    eval 'sub E1000_RDLEN1 () {0x2908;}' unless defined(&E1000_RDLEN1);
    eval 'sub E1000_RDH1 () {0x2910;}' unless defined(&E1000_RDH1);
    eval 'sub E1000_RDT1 () {0x2918;}' unless defined(&E1000_RDT1);
    eval 'sub E1000_FCTTV () {0x170;}' unless defined(&E1000_FCTTV);
    eval 'sub E1000_TXCW () {0x178;}' unless defined(&E1000_TXCW);
    eval 'sub E1000_RXCW () {0x180;}' unless defined(&E1000_RXCW);
    eval 'sub E1000_TCTL () {0x400;}' unless defined(&E1000_TCTL);
    eval 'sub E1000_TCTL_EXT () {0x404;}' unless defined(&E1000_TCTL_EXT);
    eval 'sub E1000_TIPG () {0x410;}' unless defined(&E1000_TIPG);
    eval 'sub E1000_TBT () {0x448;}' unless defined(&E1000_TBT);
    eval 'sub E1000_AIT () {0x458;}' unless defined(&E1000_AIT);
    eval 'sub E1000_LEDCTL () {0xe00;}' unless defined(&E1000_LEDCTL);
    eval 'sub E1000_EXTCNF_CTRL () {0xf00;}' unless defined(&E1000_EXTCNF_CTRL);
    eval 'sub E1000_EXTCNF_SIZE () {0xf08;}' unless defined(&E1000_EXTCNF_SIZE);
    eval 'sub E1000_PHY_CTRL () {0xf10;}' unless defined(&E1000_PHY_CTRL);
    eval 'sub FEXTNVM_SW_CONFIG () {0x1;}' unless defined(&FEXTNVM_SW_CONFIG);
    eval 'sub E1000_PBA () {0x1000;}' unless defined(&E1000_PBA);
    eval 'sub E1000_PBS () {0x1008;}' unless defined(&E1000_PBS);
    eval 'sub E1000_EEMNGCTL () {0x1010;}' unless defined(&E1000_EEMNGCTL);
    eval 'sub E1000_FLASH_UPDATES () {1000;}' unless defined(&E1000_FLASH_UPDATES);
    eval 'sub E1000_EEARBC () {0x1024;}' unless defined(&E1000_EEARBC);
    eval 'sub E1000_FLASHT () {0x1028;}' unless defined(&E1000_FLASHT);
    eval 'sub E1000_EEWR () {0x102c;}' unless defined(&E1000_EEWR);
    eval 'sub E1000_FLSWCTL () {0x1030;}' unless defined(&E1000_FLSWCTL);
    eval 'sub E1000_FLSWDATA () {0x1034;}' unless defined(&E1000_FLSWDATA);
    eval 'sub E1000_FLSWCNT () {0x1038;}' unless defined(&E1000_FLSWCNT);
    eval 'sub E1000_FLOP () {0x103c;}' unless defined(&E1000_FLOP);
    eval 'sub E1000_ERT () {0x2008;}' unless defined(&E1000_ERT);
    eval 'sub E1000_FCRTL () {0x2160;}' unless defined(&E1000_FCRTL);
    eval 'sub E1000_FCRTH () {0x2168;}' unless defined(&E1000_FCRTH);
    eval 'sub E1000_PSRCTL () {0x2170;}' unless defined(&E1000_PSRCTL);
    eval 'sub E1000_RDBAL () {0x2800;}' unless defined(&E1000_RDBAL);
    eval 'sub E1000_RDBAH () {0x2804;}' unless defined(&E1000_RDBAH);
    eval 'sub E1000_RDLEN () {0x2808;}' unless defined(&E1000_RDLEN);
    eval 'sub E1000_RDH () {0x2810;}' unless defined(&E1000_RDH);
    eval 'sub E1000_RDT () {0x2818;}' unless defined(&E1000_RDT);
    eval 'sub E1000_RDTR () {0x2820;}' unless defined(&E1000_RDTR);
    eval 'sub E1000_RDBAL0 () { &E1000_RDBAL;}' unless defined(&E1000_RDBAL0);
    eval 'sub E1000_RDBAH0 () { &E1000_RDBAH;}' unless defined(&E1000_RDBAH0);
    eval 'sub E1000_RDLEN0 () { &E1000_RDLEN;}' unless defined(&E1000_RDLEN0);
    eval 'sub E1000_RDH0 () { &E1000_RDH;}' unless defined(&E1000_RDH0);
    eval 'sub E1000_RDT0 () { &E1000_RDT;}' unless defined(&E1000_RDT0);
    eval 'sub E1000_RDTR0 () { &E1000_RDTR;}' unless defined(&E1000_RDTR0);
    eval 'sub E1000_RXDCTL () {0x2828;}' unless defined(&E1000_RXDCTL);
    eval 'sub E1000_RXDCTL1 () {0x2928;}' unless defined(&E1000_RXDCTL1);
    eval 'sub E1000_RADV () {0x282c;}' unless defined(&E1000_RADV);
    eval 'sub E1000_RSRPD () {0x2c00;}' unless defined(&E1000_RSRPD);
    eval 'sub E1000_RAID () {0x2c08;}' unless defined(&E1000_RAID);
    eval 'sub E1000_TXDMAC () {0x3000;}' unless defined(&E1000_TXDMAC);
    eval 'sub E1000_KABGTXD () {0x3004;}' unless defined(&E1000_KABGTXD);
    eval 'sub E1000_TDFH () {0x3410;}' unless defined(&E1000_TDFH);
    eval 'sub E1000_TDFT () {0x3418;}' unless defined(&E1000_TDFT);
    eval 'sub E1000_TDFHS () {0x3420;}' unless defined(&E1000_TDFHS);
    eval 'sub E1000_TDFTS () {0x3428;}' unless defined(&E1000_TDFTS);
    eval 'sub E1000_TDFPC () {0x3430;}' unless defined(&E1000_TDFPC);
    eval 'sub E1000_TDBAL () {0x3800;}' unless defined(&E1000_TDBAL);
    eval 'sub E1000_TDBAH () {0x3804;}' unless defined(&E1000_TDBAH);
    eval 'sub E1000_TDLEN () {0x3808;}' unless defined(&E1000_TDLEN);
    eval 'sub E1000_TDH () {0x3810;}' unless defined(&E1000_TDH);
    eval 'sub E1000_TDT () {0x3818;}' unless defined(&E1000_TDT);
    eval 'sub E1000_TIDV () {0x3820;}' unless defined(&E1000_TIDV);
    eval 'sub E1000_TXDCTL () {0x3828;}' unless defined(&E1000_TXDCTL);
    eval 'sub E1000_TADV () {0x382c;}' unless defined(&E1000_TADV);
    eval 'sub E1000_TSPMT () {0x3830;}' unless defined(&E1000_TSPMT);
    eval 'sub E1000_TARC0 () {0x3840;}' unless defined(&E1000_TARC0);
    eval 'sub E1000_TDBAL1 () {0x3900;}' unless defined(&E1000_TDBAL1);
    eval 'sub E1000_TDBAH1 () {0x3904;}' unless defined(&E1000_TDBAH1);
    eval 'sub E1000_TDLEN1 () {0x3908;}' unless defined(&E1000_TDLEN1);
    eval 'sub E1000_TDH1 () {0x3910;}' unless defined(&E1000_TDH1);
    eval 'sub E1000_TDT1 () {0x3918;}' unless defined(&E1000_TDT1);
    eval 'sub E1000_TXDCTL1 () {0x3928;}' unless defined(&E1000_TXDCTL1);
    eval 'sub E1000_TARC1 () {0x3940;}' unless defined(&E1000_TARC1);
    eval 'sub E1000_CRCERRS () {0x4000;}' unless defined(&E1000_CRCERRS);
    eval 'sub E1000_ALGNERRC () {0x4004;}' unless defined(&E1000_ALGNERRC);
    eval 'sub E1000_SYMERRS () {0x4008;}' unless defined(&E1000_SYMERRS);
    eval 'sub E1000_RXERRC () {0x400c;}' unless defined(&E1000_RXERRC);
    eval 'sub E1000_MPC () {0x4010;}' unless defined(&E1000_MPC);
    eval 'sub E1000_SCC () {0x4014;}' unless defined(&E1000_SCC);
    eval 'sub E1000_ECOL () {0x4018;}' unless defined(&E1000_ECOL);
    eval 'sub E1000_MCC () {0x401c;}' unless defined(&E1000_MCC);
    eval 'sub E1000_LATECOL () {0x4020;}' unless defined(&E1000_LATECOL);
    eval 'sub E1000_COLC () {0x4028;}' unless defined(&E1000_COLC);
    eval 'sub E1000_DC () {0x4030;}' unless defined(&E1000_DC);
    eval 'sub E1000_TNCRS () {0x4034;}' unless defined(&E1000_TNCRS);
    eval 'sub E1000_SEC () {0x4038;}' unless defined(&E1000_SEC);
    eval 'sub E1000_CEXTERR () {0x403c;}' unless defined(&E1000_CEXTERR);
    eval 'sub E1000_RLEC () {0x4040;}' unless defined(&E1000_RLEC);
    eval 'sub E1000_XONRXC () {0x4048;}' unless defined(&E1000_XONRXC);
    eval 'sub E1000_XONTXC () {0x404c;}' unless defined(&E1000_XONTXC);
    eval 'sub E1000_XOFFRXC () {0x4050;}' unless defined(&E1000_XOFFRXC);
    eval 'sub E1000_XOFFTXC () {0x4054;}' unless defined(&E1000_XOFFTXC);
    eval 'sub E1000_FCRUC () {0x4058;}' unless defined(&E1000_FCRUC);
    eval 'sub E1000_PRC64 () {0x405c;}' unless defined(&E1000_PRC64);
    eval 'sub E1000_PRC127 () {0x4060;}' unless defined(&E1000_PRC127);
    eval 'sub E1000_PRC255 () {0x4064;}' unless defined(&E1000_PRC255);
    eval 'sub E1000_PRC511 () {0x4068;}' unless defined(&E1000_PRC511);
    eval 'sub E1000_PRC1023 () {0x406c;}' unless defined(&E1000_PRC1023);
    eval 'sub E1000_PRC1522 () {0x4070;}' unless defined(&E1000_PRC1522);
    eval 'sub E1000_GPRC () {0x4074;}' unless defined(&E1000_GPRC);
    eval 'sub E1000_BPRC () {0x4078;}' unless defined(&E1000_BPRC);
    eval 'sub E1000_MPRC () {0x407c;}' unless defined(&E1000_MPRC);
    eval 'sub E1000_GPTC () {0x4080;}' unless defined(&E1000_GPTC);
    eval 'sub E1000_GORCL () {0x4088;}' unless defined(&E1000_GORCL);
    eval 'sub E1000_GORCH () {0x408c;}' unless defined(&E1000_GORCH);
    eval 'sub E1000_GOTCL () {0x4090;}' unless defined(&E1000_GOTCL);
    eval 'sub E1000_GOTCH () {0x4094;}' unless defined(&E1000_GOTCH);
    eval 'sub E1000_RNBC () {0x40a0;}' unless defined(&E1000_RNBC);
    eval 'sub E1000_RUC () {0x40a4;}' unless defined(&E1000_RUC);
    eval 'sub E1000_RFC () {0x40a8;}' unless defined(&E1000_RFC);
    eval 'sub E1000_ROC () {0x40ac;}' unless defined(&E1000_ROC);
    eval 'sub E1000_RJC () {0x40b0;}' unless defined(&E1000_RJC);
    eval 'sub E1000_MGTPRC () {0x40b4;}' unless defined(&E1000_MGTPRC);
    eval 'sub E1000_MGTPDC () {0x40b8;}' unless defined(&E1000_MGTPDC);
    eval 'sub E1000_MGTPTC () {0x40bc;}' unless defined(&E1000_MGTPTC);
    eval 'sub E1000_TORL () {0x40c0;}' unless defined(&E1000_TORL);
    eval 'sub E1000_TORH () {0x40c4;}' unless defined(&E1000_TORH);
    eval 'sub E1000_TOTL () {0x40c8;}' unless defined(&E1000_TOTL);
    eval 'sub E1000_TOTH () {0x40cc;}' unless defined(&E1000_TOTH);
    eval 'sub E1000_TPR () {0x40d0;}' unless defined(&E1000_TPR);
    eval 'sub E1000_TPT () {0x40d4;}' unless defined(&E1000_TPT);
    eval 'sub E1000_PTC64 () {0x40d8;}' unless defined(&E1000_PTC64);
    eval 'sub E1000_PTC127 () {0x40dc;}' unless defined(&E1000_PTC127);
    eval 'sub E1000_PTC255 () {0x40e0;}' unless defined(&E1000_PTC255);
    eval 'sub E1000_PTC511 () {0x40e4;}' unless defined(&E1000_PTC511);
    eval 'sub E1000_PTC1023 () {0x40e8;}' unless defined(&E1000_PTC1023);
    eval 'sub E1000_PTC1522 () {0x40ec;}' unless defined(&E1000_PTC1522);
    eval 'sub E1000_MPTC () {0x40f0;}' unless defined(&E1000_MPTC);
    eval 'sub E1000_BPTC () {0x40f4;}' unless defined(&E1000_BPTC);
    eval 'sub E1000_TSCTC () {0x40f8;}' unless defined(&E1000_TSCTC);
    eval 'sub E1000_TSCTFC () {0x40fc;}' unless defined(&E1000_TSCTFC);
    eval 'sub E1000_IAC () {0x4100;}' unless defined(&E1000_IAC);
    eval 'sub E1000_ICRXPTC () {0x4104;}' unless defined(&E1000_ICRXPTC);
    eval 'sub E1000_ICRXATC () {0x4108;}' unless defined(&E1000_ICRXATC);
    eval 'sub E1000_ICTXPTC () {0x410c;}' unless defined(&E1000_ICTXPTC);
    eval 'sub E1000_ICTXATC () {0x4110;}' unless defined(&E1000_ICTXATC);
    eval 'sub E1000_ICTXQEC () {0x4118;}' unless defined(&E1000_ICTXQEC);
    eval 'sub E1000_ICTXQMTC () {0x411c;}' unless defined(&E1000_ICTXQMTC);
    eval 'sub E1000_ICRXDMTC () {0x4120;}' unless defined(&E1000_ICRXDMTC);
    eval 'sub E1000_ICRXOC () {0x4124;}' unless defined(&E1000_ICRXOC);
    eval 'sub E1000_RXCSUM () {0x5000;}' unless defined(&E1000_RXCSUM);
    eval 'sub E1000_RFCTL () {0x5008;}' unless defined(&E1000_RFCTL);
    eval 'sub E1000_MTA () {0x5200;}' unless defined(&E1000_MTA);
    eval 'sub E1000_RA () {0x5400;}' unless defined(&E1000_RA);
    eval 'sub E1000_VFTA () {0x5600;}' unless defined(&E1000_VFTA);
    eval 'sub E1000_WUC () {0x5800;}' unless defined(&E1000_WUC);
    eval 'sub E1000_WUFC () {0x5808;}' unless defined(&E1000_WUFC);
    eval 'sub E1000_WUS () {0x5810;}' unless defined(&E1000_WUS);
    eval 'sub E1000_MANC () {0x5820;}' unless defined(&E1000_MANC);
    eval 'sub E1000_IPAV () {0x5838;}' unless defined(&E1000_IPAV);
    eval 'sub E1000_IP4AT () {0x5840;}' unless defined(&E1000_IP4AT);
    eval 'sub E1000_IP6AT () {0x5880;}' unless defined(&E1000_IP6AT);
    eval 'sub E1000_WUPL () {0x5900;}' unless defined(&E1000_WUPL);
    eval 'sub E1000_WUPM () {0x5a00;}' unless defined(&E1000_WUPM);
    eval 'sub E1000_FFLT () {0x5f00;}' unless defined(&E1000_FFLT);
    eval 'sub E1000_HOST_IF () {0x8800;}' unless defined(&E1000_HOST_IF);
    eval 'sub E1000_FFMT () {0x9000;}' unless defined(&E1000_FFMT);
    eval 'sub E1000_FFVT () {0x9800;}' unless defined(&E1000_FFVT);
    eval 'sub E1000_KUMCTRLSTA () {0x34;}' unless defined(&E1000_KUMCTRLSTA);
    eval 'sub E1000_MDPHYA () {0x3c;}' unless defined(&E1000_MDPHYA);
    eval 'sub E1000_MANC2H () {0x5860;}' unless defined(&E1000_MANC2H);
    eval 'sub E1000_SW_FW_SYNC () {0x5b5c;}' unless defined(&E1000_SW_FW_SYNC);
    eval 'sub E1000_GCR () {0x5b00;}' unless defined(&E1000_GCR);
    eval 'sub E1000_GSCL_1 () {0x5b10;}' unless defined(&E1000_GSCL_1);
    eval 'sub E1000_GSCL_2 () {0x5b14;}' unless defined(&E1000_GSCL_2);
    eval 'sub E1000_GSCL_3 () {0x5b18;}' unless defined(&E1000_GSCL_3);
    eval 'sub E1000_GSCL_4 () {0x5b1c;}' unless defined(&E1000_GSCL_4);
    eval 'sub E1000_FACTPS () {0x5b30;}' unless defined(&E1000_FACTPS);
    eval 'sub E1000_SWSM () {0x5b50;}' unless defined(&E1000_SWSM);
    eval 'sub E1000_FWSM () {0x5b54;}' unless defined(&E1000_FWSM);
    eval 'sub E1000_FFLT_DBG () {0x5f04;}' unless defined(&E1000_FFLT_DBG);
    eval 'sub E1000_HICR () {0x8f00;}' unless defined(&E1000_HICR);
    eval 'sub E1000_CPUVEC () {0x2c10;}' unless defined(&E1000_CPUVEC);
    eval 'sub E1000_MRQC () {0x5818;}' unless defined(&E1000_MRQC);
    eval 'sub E1000_RETA () {0x5c00;}' unless defined(&E1000_RETA);
    eval 'sub E1000_RSSRK () {0x5c80;}' unless defined(&E1000_RSSRK);
    eval 'sub E1000_RSSIM () {0x5864;}' unless defined(&E1000_RSSIM);
    eval 'sub E1000_RSSIR () {0x5868;}' unless defined(&E1000_RSSIR);
    eval 'sub E1000_82542_CTRL () { &E1000_CTRL;}' unless defined(&E1000_82542_CTRL);
    eval 'sub E1000_82542_CTRL_DUP () { &E1000_CTRL_DUP;}' unless defined(&E1000_82542_CTRL_DUP);
    eval 'sub E1000_82542_STATUS () { &E1000_STATUS;}' unless defined(&E1000_82542_STATUS);
    eval 'sub E1000_82542_EECD () { &E1000_EECD;}' unless defined(&E1000_82542_EECD);
    eval 'sub E1000_82542_EERD () { &E1000_EERD;}' unless defined(&E1000_82542_EERD);
    eval 'sub E1000_82542_CTRL_EXT () { &E1000_CTRL_EXT;}' unless defined(&E1000_82542_CTRL_EXT);
    eval 'sub E1000_82542_FLA () { &E1000_FLA;}' unless defined(&E1000_82542_FLA);
    eval 'sub E1000_82542_MDIC () { &E1000_MDIC;}' unless defined(&E1000_82542_MDIC);
    eval 'sub E1000_82542_SCTL () { &E1000_SCTL;}' unless defined(&E1000_82542_SCTL);
    eval 'sub E1000_82542_FEXTNVM () { &E1000_FEXTNVM;}' unless defined(&E1000_82542_FEXTNVM);
    eval 'sub E1000_82542_FCAL () { &E1000_FCAL;}' unless defined(&E1000_82542_FCAL);
    eval 'sub E1000_82542_FCAH () { &E1000_FCAH;}' unless defined(&E1000_82542_FCAH);
    eval 'sub E1000_82542_FCT () { &E1000_FCT;}' unless defined(&E1000_82542_FCT);
    eval 'sub E1000_82542_VET () { &E1000_VET;}' unless defined(&E1000_82542_VET);
    eval 'sub E1000_82542_RA () {0x40;}' unless defined(&E1000_82542_RA);
    eval 'sub E1000_82542_ICR () { &E1000_ICR;}' unless defined(&E1000_82542_ICR);
    eval 'sub E1000_82542_ITR () { &E1000_ITR;}' unless defined(&E1000_82542_ITR);
    eval 'sub E1000_82542_ICS () { &E1000_ICS;}' unless defined(&E1000_82542_ICS);
    eval 'sub E1000_82542_IMS () { &E1000_IMS;}' unless defined(&E1000_82542_IMS);
    eval 'sub E1000_82542_IMC () { &E1000_IMC;}' unless defined(&E1000_82542_IMC);
    eval 'sub E1000_82542_RCTL () { &E1000_RCTL;}' unless defined(&E1000_82542_RCTL);
    eval 'sub E1000_82542_RDTR () {0x108;}' unless defined(&E1000_82542_RDTR);
    eval 'sub E1000_82542_RDBAL () {0x110;}' unless defined(&E1000_82542_RDBAL);
    eval 'sub E1000_82542_RDBAH () {0x114;}' unless defined(&E1000_82542_RDBAH);
    eval 'sub E1000_82542_RDLEN () {0x118;}' unless defined(&E1000_82542_RDLEN);
    eval 'sub E1000_82542_RDH () {0x120;}' unless defined(&E1000_82542_RDH);
    eval 'sub E1000_82542_RDT () {0x128;}' unless defined(&E1000_82542_RDT);
    eval 'sub E1000_82542_RDTR0 () { &E1000_82542_RDTR;}' unless defined(&E1000_82542_RDTR0);
    eval 'sub E1000_82542_RDBAL0 () { &E1000_82542_RDBAL;}' unless defined(&E1000_82542_RDBAL0);
    eval 'sub E1000_82542_RDBAH0 () { &E1000_82542_RDBAH;}' unless defined(&E1000_82542_RDBAH0);
    eval 'sub E1000_82542_RDLEN0 () { &E1000_82542_RDLEN;}' unless defined(&E1000_82542_RDLEN0);
    eval 'sub E1000_82542_RDH0 () { &E1000_82542_RDH;}' unless defined(&E1000_82542_RDH0);
    eval 'sub E1000_82542_RDT0 () { &E1000_82542_RDT;}' unless defined(&E1000_82542_RDT0);
    eval 'sub E1000_82542_SRRCTL {
        my($_n) = @_;
	    eval q((0x280c + (($_n) << 8)));
    }' unless defined(&E1000_82542_SRRCTL);
    eval 'sub E1000_82542_DCA_RXCTRL {
        my($_n) = @_;
	    eval q((0x2814 + (($_n) << 8)));
    }' unless defined(&E1000_82542_DCA_RXCTRL);
    eval 'sub E1000_82542_RDBAH3 () {0x2b04;}' unless defined(&E1000_82542_RDBAH3);
    eval 'sub E1000_82542_RDBAL3 () {0x2b00;}' unless defined(&E1000_82542_RDBAL3);
    eval 'sub E1000_82542_RDLEN3 () {0x2b08;}' unless defined(&E1000_82542_RDLEN3);
    eval 'sub E1000_82542_RDH3 () {0x2b10;}' unless defined(&E1000_82542_RDH3);
    eval 'sub E1000_82542_RDT3 () {0x2b18;}' unless defined(&E1000_82542_RDT3);
    eval 'sub E1000_82542_RDBAL2 () {0x2a00;}' unless defined(&E1000_82542_RDBAL2);
    eval 'sub E1000_82542_RDBAH2 () {0x2a04;}' unless defined(&E1000_82542_RDBAH2);
    eval 'sub E1000_82542_RDLEN2 () {0x2a08;}' unless defined(&E1000_82542_RDLEN2);
    eval 'sub E1000_82542_RDH2 () {0x2a10;}' unless defined(&E1000_82542_RDH2);
    eval 'sub E1000_82542_RDT2 () {0x2a18;}' unless defined(&E1000_82542_RDT2);
    eval 'sub E1000_82542_RDTR1 () {0x130;}' unless defined(&E1000_82542_RDTR1);
    eval 'sub E1000_82542_RDBAL1 () {0x138;}' unless defined(&E1000_82542_RDBAL1);
    eval 'sub E1000_82542_RDBAH1 () {0x13c;}' unless defined(&E1000_82542_RDBAH1);
    eval 'sub E1000_82542_RDLEN1 () {0x140;}' unless defined(&E1000_82542_RDLEN1);
    eval 'sub E1000_82542_RDH1 () {0x148;}' unless defined(&E1000_82542_RDH1);
    eval 'sub E1000_82542_RDT1 () {0x150;}' unless defined(&E1000_82542_RDT1);
    eval 'sub E1000_82542_FCRTH () {0x160;}' unless defined(&E1000_82542_FCRTH);
    eval 'sub E1000_82542_FCRTL () {0x168;}' unless defined(&E1000_82542_FCRTL);
    eval 'sub E1000_82542_FCTTV () { &E1000_FCTTV;}' unless defined(&E1000_82542_FCTTV);
    eval 'sub E1000_82542_TXCW () { &E1000_TXCW;}' unless defined(&E1000_82542_TXCW);
    eval 'sub E1000_82542_RXCW () { &E1000_RXCW;}' unless defined(&E1000_82542_RXCW);
    eval 'sub E1000_82542_MTA () {0x200;}' unless defined(&E1000_82542_MTA);
    eval 'sub E1000_82542_TCTL () { &E1000_TCTL;}' unless defined(&E1000_82542_TCTL);
    eval 'sub E1000_82542_TCTL_EXT () { &E1000_TCTL_EXT;}' unless defined(&E1000_82542_TCTL_EXT);
    eval 'sub E1000_82542_TIPG () { &E1000_TIPG;}' unless defined(&E1000_82542_TIPG);
    eval 'sub E1000_82542_TDBAL () {0x420;}' unless defined(&E1000_82542_TDBAL);
    eval 'sub E1000_82542_TDBAH () {0x424;}' unless defined(&E1000_82542_TDBAH);
    eval 'sub E1000_82542_TDLEN () {0x428;}' unless defined(&E1000_82542_TDLEN);
    eval 'sub E1000_82542_TDH () {0x430;}' unless defined(&E1000_82542_TDH);
    eval 'sub E1000_82542_TDT () {0x438;}' unless defined(&E1000_82542_TDT);
    eval 'sub E1000_82542_TIDV () {0x440;}' unless defined(&E1000_82542_TIDV);
    eval 'sub E1000_82542_TBT () { &E1000_TBT;}' unless defined(&E1000_82542_TBT);
    eval 'sub E1000_82542_AIT () { &E1000_AIT;}' unless defined(&E1000_82542_AIT);
    eval 'sub E1000_82542_VFTA () {0x600;}' unless defined(&E1000_82542_VFTA);
    eval 'sub E1000_82542_LEDCTL () { &E1000_LEDCTL;}' unless defined(&E1000_82542_LEDCTL);
    eval 'sub E1000_82542_PBA () { &E1000_PBA;}' unless defined(&E1000_82542_PBA);
    eval 'sub E1000_82542_PBS () { &E1000_PBS;}' unless defined(&E1000_82542_PBS);
    eval 'sub E1000_82542_EEMNGCTL () { &E1000_EEMNGCTL;}' unless defined(&E1000_82542_EEMNGCTL);
    eval 'sub E1000_82542_EEARBC () { &E1000_EEARBC;}' unless defined(&E1000_82542_EEARBC);
    eval 'sub E1000_82542_FLASHT () { &E1000_FLASHT;}' unless defined(&E1000_82542_FLASHT);
    eval 'sub E1000_82542_EEWR () { &E1000_EEWR;}' unless defined(&E1000_82542_EEWR);
    eval 'sub E1000_82542_FLSWCTL () { &E1000_FLSWCTL;}' unless defined(&E1000_82542_FLSWCTL);
    eval 'sub E1000_82542_FLSWDATA () { &E1000_FLSWDATA;}' unless defined(&E1000_82542_FLSWDATA);
    eval 'sub E1000_82542_FLSWCNT () { &E1000_FLSWCNT;}' unless defined(&E1000_82542_FLSWCNT);
    eval 'sub E1000_82542_FLOP () { &E1000_FLOP;}' unless defined(&E1000_82542_FLOP);
    eval 'sub E1000_82542_EXTCNF_CTRL () { &E1000_EXTCNF_CTRL;}' unless defined(&E1000_82542_EXTCNF_CTRL);
    eval 'sub E1000_82542_EXTCNF_SIZE () { &E1000_EXTCNF_SIZE;}' unless defined(&E1000_82542_EXTCNF_SIZE);
    eval 'sub E1000_82542_PHY_CTRL () { &E1000_PHY_CTRL;}' unless defined(&E1000_82542_PHY_CTRL);
    eval 'sub E1000_82542_ERT () { &E1000_ERT;}' unless defined(&E1000_82542_ERT);
    eval 'sub E1000_82542_RXDCTL () { &E1000_RXDCTL;}' unless defined(&E1000_82542_RXDCTL);
    eval 'sub E1000_82542_RXDCTL1 () { &E1000_RXDCTL1;}' unless defined(&E1000_82542_RXDCTL1);
    eval 'sub E1000_82542_RADV () { &E1000_RADV;}' unless defined(&E1000_82542_RADV);
    eval 'sub E1000_82542_RSRPD () { &E1000_RSRPD;}' unless defined(&E1000_82542_RSRPD);
    eval 'sub E1000_82542_TXDMAC () { &E1000_TXDMAC;}' unless defined(&E1000_82542_TXDMAC);
    eval 'sub E1000_82542_KABGTXD () { &E1000_KABGTXD;}' unless defined(&E1000_82542_KABGTXD);
    eval 'sub E1000_82542_TDFHS () { &E1000_TDFHS;}' unless defined(&E1000_82542_TDFHS);
    eval 'sub E1000_82542_TDFTS () { &E1000_TDFTS;}' unless defined(&E1000_82542_TDFTS);
    eval 'sub E1000_82542_TDFPC () { &E1000_TDFPC;}' unless defined(&E1000_82542_TDFPC);
    eval 'sub E1000_82542_TXDCTL () { &E1000_TXDCTL;}' unless defined(&E1000_82542_TXDCTL);
    eval 'sub E1000_82542_TADV () { &E1000_TADV;}' unless defined(&E1000_82542_TADV);
    eval 'sub E1000_82542_TSPMT () { &E1000_TSPMT;}' unless defined(&E1000_82542_TSPMT);
    eval 'sub E1000_82542_CRCERRS () { &E1000_CRCERRS;}' unless defined(&E1000_82542_CRCERRS);
    eval 'sub E1000_82542_ALGNERRC () { &E1000_ALGNERRC;}' unless defined(&E1000_82542_ALGNERRC);
    eval 'sub E1000_82542_SYMERRS () { &E1000_SYMERRS;}' unless defined(&E1000_82542_SYMERRS);
    eval 'sub E1000_82542_RXERRC () { &E1000_RXERRC;}' unless defined(&E1000_82542_RXERRC);
    eval 'sub E1000_82542_MPC () { &E1000_MPC;}' unless defined(&E1000_82542_MPC);
    eval 'sub E1000_82542_SCC () { &E1000_SCC;}' unless defined(&E1000_82542_SCC);
    eval 'sub E1000_82542_ECOL () { &E1000_ECOL;}' unless defined(&E1000_82542_ECOL);
    eval 'sub E1000_82542_MCC () { &E1000_MCC;}' unless defined(&E1000_82542_MCC);
    eval 'sub E1000_82542_LATECOL () { &E1000_LATECOL;}' unless defined(&E1000_82542_LATECOL);
    eval 'sub E1000_82542_COLC () { &E1000_COLC;}' unless defined(&E1000_82542_COLC);
    eval 'sub E1000_82542_DC () { &E1000_DC;}' unless defined(&E1000_82542_DC);
    eval 'sub E1000_82542_TNCRS () { &E1000_TNCRS;}' unless defined(&E1000_82542_TNCRS);
    eval 'sub E1000_82542_SEC () { &E1000_SEC;}' unless defined(&E1000_82542_SEC);
    eval 'sub E1000_82542_CEXTERR () { &E1000_CEXTERR;}' unless defined(&E1000_82542_CEXTERR);
    eval 'sub E1000_82542_RLEC () { &E1000_RLEC;}' unless defined(&E1000_82542_RLEC);
    eval 'sub E1000_82542_XONRXC () { &E1000_XONRXC;}' unless defined(&E1000_82542_XONRXC);
    eval 'sub E1000_82542_XONTXC () { &E1000_XONTXC;}' unless defined(&E1000_82542_XONTXC);
    eval 'sub E1000_82542_XOFFRXC () { &E1000_XOFFRXC;}' unless defined(&E1000_82542_XOFFRXC);
    eval 'sub E1000_82542_XOFFTXC () { &E1000_XOFFTXC;}' unless defined(&E1000_82542_XOFFTXC);
    eval 'sub E1000_82542_FCRUC () { &E1000_FCRUC;}' unless defined(&E1000_82542_FCRUC);
    eval 'sub E1000_82542_PRC64 () { &E1000_PRC64;}' unless defined(&E1000_82542_PRC64);
    eval 'sub E1000_82542_PRC127 () { &E1000_PRC127;}' unless defined(&E1000_82542_PRC127);
    eval 'sub E1000_82542_PRC255 () { &E1000_PRC255;}' unless defined(&E1000_82542_PRC255);
    eval 'sub E1000_82542_PRC511 () { &E1000_PRC511;}' unless defined(&E1000_82542_PRC511);
    eval 'sub E1000_82542_PRC1023 () { &E1000_PRC1023;}' unless defined(&E1000_82542_PRC1023);
    eval 'sub E1000_82542_PRC1522 () { &E1000_PRC1522;}' unless defined(&E1000_82542_PRC1522);
    eval 'sub E1000_82542_GPRC () { &E1000_GPRC;}' unless defined(&E1000_82542_GPRC);
    eval 'sub E1000_82542_BPRC () { &E1000_BPRC;}' unless defined(&E1000_82542_BPRC);
    eval 'sub E1000_82542_MPRC () { &E1000_MPRC;}' unless defined(&E1000_82542_MPRC);
    eval 'sub E1000_82542_GPTC () { &E1000_GPTC;}' unless defined(&E1000_82542_GPTC);
    eval 'sub E1000_82542_GORCL () { &E1000_GORCL;}' unless defined(&E1000_82542_GORCL);
    eval 'sub E1000_82542_GORCH () { &E1000_GORCH;}' unless defined(&E1000_82542_GORCH);
    eval 'sub E1000_82542_GOTCL () { &E1000_GOTCL;}' unless defined(&E1000_82542_GOTCL);
    eval 'sub E1000_82542_GOTCH () { &E1000_GOTCH;}' unless defined(&E1000_82542_GOTCH);
    eval 'sub E1000_82542_RNBC () { &E1000_RNBC;}' unless defined(&E1000_82542_RNBC);
    eval 'sub E1000_82542_RUC () { &E1000_RUC;}' unless defined(&E1000_82542_RUC);
    eval 'sub E1000_82542_RFC () { &E1000_RFC;}' unless defined(&E1000_82542_RFC);
    eval 'sub E1000_82542_ROC () { &E1000_ROC;}' unless defined(&E1000_82542_ROC);
    eval 'sub E1000_82542_RJC () { &E1000_RJC;}' unless defined(&E1000_82542_RJC);
    eval 'sub E1000_82542_MGTPRC () { &E1000_MGTPRC;}' unless defined(&E1000_82542_MGTPRC);
    eval 'sub E1000_82542_MGTPDC () { &E1000_MGTPDC;}' unless defined(&E1000_82542_MGTPDC);
    eval 'sub E1000_82542_MGTPTC () { &E1000_MGTPTC;}' unless defined(&E1000_82542_MGTPTC);
    eval 'sub E1000_82542_TORL () { &E1000_TORL;}' unless defined(&E1000_82542_TORL);
    eval 'sub E1000_82542_TORH () { &E1000_TORH;}' unless defined(&E1000_82542_TORH);
    eval 'sub E1000_82542_TOTL () { &E1000_TOTL;}' unless defined(&E1000_82542_TOTL);
    eval 'sub E1000_82542_TOTH () { &E1000_TOTH;}' unless defined(&E1000_82542_TOTH);
    eval 'sub E1000_82542_TPR () { &E1000_TPR;}' unless defined(&E1000_82542_TPR);
    eval 'sub E1000_82542_TPT () { &E1000_TPT;}' unless defined(&E1000_82542_TPT);
    eval 'sub E1000_82542_PTC64 () { &E1000_PTC64;}' unless defined(&E1000_82542_PTC64);
    eval 'sub E1000_82542_PTC127 () { &E1000_PTC127;}' unless defined(&E1000_82542_PTC127);
    eval 'sub E1000_82542_PTC255 () { &E1000_PTC255;}' unless defined(&E1000_82542_PTC255);
    eval 'sub E1000_82542_PTC511 () { &E1000_PTC511;}' unless defined(&E1000_82542_PTC511);
    eval 'sub E1000_82542_PTC1023 () { &E1000_PTC1023;}' unless defined(&E1000_82542_PTC1023);
    eval 'sub E1000_82542_PTC1522 () { &E1000_PTC1522;}' unless defined(&E1000_82542_PTC1522);
    eval 'sub E1000_82542_MPTC () { &E1000_MPTC;}' unless defined(&E1000_82542_MPTC);
    eval 'sub E1000_82542_BPTC () { &E1000_BPTC;}' unless defined(&E1000_82542_BPTC);
    eval 'sub E1000_82542_TSCTC () { &E1000_TSCTC;}' unless defined(&E1000_82542_TSCTC);
    eval 'sub E1000_82542_TSCTFC () { &E1000_TSCTFC;}' unless defined(&E1000_82542_TSCTFC);
    eval 'sub E1000_82542_RXCSUM () { &E1000_RXCSUM;}' unless defined(&E1000_82542_RXCSUM);
    eval 'sub E1000_82542_WUC () { &E1000_WUC;}' unless defined(&E1000_82542_WUC);
    eval 'sub E1000_82542_WUFC () { &E1000_WUFC;}' unless defined(&E1000_82542_WUFC);
    eval 'sub E1000_82542_WUS () { &E1000_WUS;}' unless defined(&E1000_82542_WUS);
    eval 'sub E1000_82542_MANC () { &E1000_MANC;}' unless defined(&E1000_82542_MANC);
    eval 'sub E1000_82542_IPAV () { &E1000_IPAV;}' unless defined(&E1000_82542_IPAV);
    eval 'sub E1000_82542_IP4AT () { &E1000_IP4AT;}' unless defined(&E1000_82542_IP4AT);
    eval 'sub E1000_82542_IP6AT () { &E1000_IP6AT;}' unless defined(&E1000_82542_IP6AT);
    eval 'sub E1000_82542_WUPL () { &E1000_WUPL;}' unless defined(&E1000_82542_WUPL);
    eval 'sub E1000_82542_WUPM () { &E1000_WUPM;}' unless defined(&E1000_82542_WUPM);
    eval 'sub E1000_82542_FFLT () { &E1000_FFLT;}' unless defined(&E1000_82542_FFLT);
    eval 'sub E1000_82542_TDFH () {0x8010;}' unless defined(&E1000_82542_TDFH);
    eval 'sub E1000_82542_TDFT () {0x8018;}' unless defined(&E1000_82542_TDFT);
    eval 'sub E1000_82542_FFMT () { &E1000_FFMT;}' unless defined(&E1000_82542_FFMT);
    eval 'sub E1000_82542_FFVT () { &E1000_FFVT;}' unless defined(&E1000_82542_FFVT);
    eval 'sub E1000_82542_HOST_IF () { &E1000_HOST_IF;}' unless defined(&E1000_82542_HOST_IF);
    eval 'sub E1000_82542_IAM () { &E1000_IAM;}' unless defined(&E1000_82542_IAM);
    eval 'sub E1000_82542_EEMNGCTL () { &E1000_EEMNGCTL;}' unless defined(&E1000_82542_EEMNGCTL);
    eval 'sub E1000_82542_PSRCTL () { &E1000_PSRCTL;}' unless defined(&E1000_82542_PSRCTL);
    eval 'sub E1000_82542_RAID () { &E1000_RAID;}' unless defined(&E1000_82542_RAID);
    eval 'sub E1000_82542_TARC0 () { &E1000_TARC0;}' unless defined(&E1000_82542_TARC0);
    eval 'sub E1000_82542_TDBAL1 () { &E1000_TDBAL1;}' unless defined(&E1000_82542_TDBAL1);
    eval 'sub E1000_82542_TDBAH1 () { &E1000_TDBAH1;}' unless defined(&E1000_82542_TDBAH1);
    eval 'sub E1000_82542_TDLEN1 () { &E1000_TDLEN1;}' unless defined(&E1000_82542_TDLEN1);
    eval 'sub E1000_82542_TDH1 () { &E1000_TDH1;}' unless defined(&E1000_82542_TDH1);
    eval 'sub E1000_82542_TDT1 () { &E1000_TDT1;}' unless defined(&E1000_82542_TDT1);
    eval 'sub E1000_82542_TXDCTL1 () { &E1000_TXDCTL1;}' unless defined(&E1000_82542_TXDCTL1);
    eval 'sub E1000_82542_TARC1 () { &E1000_TARC1;}' unless defined(&E1000_82542_TARC1);
    eval 'sub E1000_82542_RFCTL () { &E1000_RFCTL;}' unless defined(&E1000_82542_RFCTL);
    eval 'sub E1000_82542_GCR () { &E1000_GCR;}' unless defined(&E1000_82542_GCR);
    eval 'sub E1000_82542_GSCL_1 () { &E1000_GSCL_1;}' unless defined(&E1000_82542_GSCL_1);
    eval 'sub E1000_82542_GSCL_2 () { &E1000_GSCL_2;}' unless defined(&E1000_82542_GSCL_2);
    eval 'sub E1000_82542_GSCL_3 () { &E1000_GSCL_3;}' unless defined(&E1000_82542_GSCL_3);
    eval 'sub E1000_82542_GSCL_4 () { &E1000_GSCL_4;}' unless defined(&E1000_82542_GSCL_4);
    eval 'sub E1000_82542_FACTPS () { &E1000_FACTPS;}' unless defined(&E1000_82542_FACTPS);
    eval 'sub E1000_82542_SWSM () { &E1000_SWSM;}' unless defined(&E1000_82542_SWSM);
    eval 'sub E1000_82542_FWSM () { &E1000_FWSM;}' unless defined(&E1000_82542_FWSM);
    eval 'sub E1000_82542_FFLT_DBG () { &E1000_FFLT_DBG;}' unless defined(&E1000_82542_FFLT_DBG);
    eval 'sub E1000_82542_IAC () { &E1000_IAC;}' unless defined(&E1000_82542_IAC);
    eval 'sub E1000_82542_ICRXPTC () { &E1000_ICRXPTC;}' unless defined(&E1000_82542_ICRXPTC);
    eval 'sub E1000_82542_ICRXATC () { &E1000_ICRXATC;}' unless defined(&E1000_82542_ICRXATC);
    eval 'sub E1000_82542_ICTXPTC () { &E1000_ICTXPTC;}' unless defined(&E1000_82542_ICTXPTC);
    eval 'sub E1000_82542_ICTXATC () { &E1000_ICTXATC;}' unless defined(&E1000_82542_ICTXATC);
    eval 'sub E1000_82542_ICTXQEC () { &E1000_ICTXQEC;}' unless defined(&E1000_82542_ICTXQEC);
    eval 'sub E1000_82542_ICTXQMTC () { &E1000_ICTXQMTC;}' unless defined(&E1000_82542_ICTXQMTC);
    eval 'sub E1000_82542_ICRXDMTC () { &E1000_ICRXDMTC;}' unless defined(&E1000_82542_ICRXDMTC);
    eval 'sub E1000_82542_ICRXOC () { &E1000_ICRXOC;}' unless defined(&E1000_82542_ICRXOC);
    eval 'sub E1000_82542_HICR () { &E1000_HICR;}' unless defined(&E1000_82542_HICR);
    eval 'sub E1000_82542_CPUVEC () { &E1000_CPUVEC;}' unless defined(&E1000_82542_CPUVEC);
    eval 'sub E1000_82542_MRQC () { &E1000_MRQC;}' unless defined(&E1000_82542_MRQC);
    eval 'sub E1000_82542_RETA () { &E1000_RETA;}' unless defined(&E1000_82542_RETA);
    eval 'sub E1000_82542_RSSRK () { &E1000_RSSRK;}' unless defined(&E1000_82542_RSSRK);
    eval 'sub E1000_82542_RSSIM () { &E1000_RSSIM;}' unless defined(&E1000_82542_RSSIM);
    eval 'sub E1000_82542_RSSIR () { &E1000_RSSIR;}' unless defined(&E1000_82542_RSSIR);
    eval 'sub E1000_82542_KUMCTRLSTA () { &E1000_KUMCTRLSTA;}' unless defined(&E1000_82542_KUMCTRLSTA);
    eval 'sub E1000_82542_SW_FW_SYNC () { &E1000_SW_FW_SYNC;}' unless defined(&E1000_82542_SW_FW_SYNC);
    eval 'sub E1000_EEPROM_SWDPIN0 () {0x1;}' unless defined(&E1000_EEPROM_SWDPIN0);
    eval 'sub E1000_EEPROM_LED_LOGIC () {0x20;}' unless defined(&E1000_EEPROM_LED_LOGIC);
    eval 'sub E1000_EEPROM_RW_REG_DATA () {16;}' unless defined(&E1000_EEPROM_RW_REG_DATA);
    eval 'sub E1000_EEPROM_RW_REG_DONE () {2;}' unless defined(&E1000_EEPROM_RW_REG_DONE);
    eval 'sub E1000_EEPROM_RW_REG_START () {1;}' unless defined(&E1000_EEPROM_RW_REG_START);
    eval 'sub E1000_EEPROM_RW_ADDR_SHIFT () {2;}' unless defined(&E1000_EEPROM_RW_ADDR_SHIFT);
    eval 'sub E1000_EEPROM_POLL_WRITE () {1;}' unless defined(&E1000_EEPROM_POLL_WRITE);
    eval 'sub E1000_EEPROM_POLL_READ () {0;}' unless defined(&E1000_EEPROM_POLL_READ);
    eval 'sub E1000_CTRL_FD () {0x1;}' unless defined(&E1000_CTRL_FD);
    eval 'sub E1000_CTRL_BEM () {0x2;}' unless defined(&E1000_CTRL_BEM);
    eval 'sub E1000_CTRL_PRIOR () {0x4;}' unless defined(&E1000_CTRL_PRIOR);
    eval 'sub E1000_CTRL_GIO_MASTER_DISABLE () {0x4;}' unless defined(&E1000_CTRL_GIO_MASTER_DISABLE);
    eval 'sub E1000_CTRL_LRST () {0x8;}' unless defined(&E1000_CTRL_LRST);
    eval 'sub E1000_CTRL_TME () {0x10;}' unless defined(&E1000_CTRL_TME);
    eval 'sub E1000_CTRL_SLE () {0x20;}' unless defined(&E1000_CTRL_SLE);
    eval 'sub E1000_CTRL_ASDE () {0x20;}' unless defined(&E1000_CTRL_ASDE);
    eval 'sub E1000_CTRL_SLU () {0x40;}' unless defined(&E1000_CTRL_SLU);
    eval 'sub E1000_CTRL_ILOS () {0x80;}' unless defined(&E1000_CTRL_ILOS);
    eval 'sub E1000_CTRL_SPD_SEL () {0x300;}' unless defined(&E1000_CTRL_SPD_SEL);
    eval 'sub E1000_CTRL_SPD_10 () {0x;}' unless defined(&E1000_CTRL_SPD_10);
    eval 'sub E1000_CTRL_SPD_100 () {0x100;}' unless defined(&E1000_CTRL_SPD_100);
    eval 'sub E1000_CTRL_SPD_1000 () {0x200;}' unless defined(&E1000_CTRL_SPD_1000);
    eval 'sub E1000_CTRL_BEM32 () {0x400;}' unless defined(&E1000_CTRL_BEM32);
    eval 'sub E1000_CTRL_FRCSPD () {0x800;}' unless defined(&E1000_CTRL_FRCSPD);
    eval 'sub E1000_CTRL_FRCDPX () {0x1000;}' unless defined(&E1000_CTRL_FRCDPX);
    eval 'sub E1000_CTRL_D_UD_EN () {0x2000;}' unless defined(&E1000_CTRL_D_UD_EN);
    eval 'sub E1000_CTRL_D_UD_POLARITY () {0x4000;}' unless defined(&E1000_CTRL_D_UD_POLARITY);
    eval 'sub E1000_CTRL_FORCE_PHY_RESET () {0x8000;}' unless defined(&E1000_CTRL_FORCE_PHY_RESET);
    eval 'sub E1000_CTRL_EXT_LINK_EN () {0x10000;}' unless defined(&E1000_CTRL_EXT_LINK_EN);
    eval 'sub E1000_CTRL_SWDPIN0 () {0x40000;}' unless defined(&E1000_CTRL_SWDPIN0);
    eval 'sub E1000_CTRL_SWDPIN1 () {0x80000;}' unless defined(&E1000_CTRL_SWDPIN1);
    eval 'sub E1000_CTRL_SWDPIN2 () {0x100000;}' unless defined(&E1000_CTRL_SWDPIN2);
    eval 'sub E1000_CTRL_SWDPIN3 () {0x200000;}' unless defined(&E1000_CTRL_SWDPIN3);
    eval 'sub E1000_CTRL_SWDPIO0 () {0x400000;}' unless defined(&E1000_CTRL_SWDPIO0);
    eval 'sub E1000_CTRL_SWDPIO1 () {0x800000;}' unless defined(&E1000_CTRL_SWDPIO1);
    eval 'sub E1000_CTRL_SWDPIO2 () {0x1000000;}' unless defined(&E1000_CTRL_SWDPIO2);
    eval 'sub E1000_CTRL_SWDPIO3 () {0x2000000;}' unless defined(&E1000_CTRL_SWDPIO3);
    eval 'sub E1000_CTRL_RST () {0x4000000;}' unless defined(&E1000_CTRL_RST);
    eval 'sub E1000_CTRL_RFCE () {0x8000000;}' unless defined(&E1000_CTRL_RFCE);
    eval 'sub E1000_CTRL_TFCE () {0x10000000;}' unless defined(&E1000_CTRL_TFCE);
    eval 'sub E1000_CTRL_RTE () {0x20000000;}' unless defined(&E1000_CTRL_RTE);
    eval 'sub E1000_CTRL_VME () {0x40000000;}' unless defined(&E1000_CTRL_VME);
    eval 'sub E1000_CTRL_PHY_RST () {0x80000000;}' unless defined(&E1000_CTRL_PHY_RST);
    eval 'sub E1000_CTRL_SW2FW_INT () {0x2000000;}' unless defined(&E1000_CTRL_SW2FW_INT);
    eval 'sub E1000_STATUS_FD () {0x1;}' unless defined(&E1000_STATUS_FD);
    eval 'sub E1000_STATUS_LU () {0x2;}' unless defined(&E1000_STATUS_LU);
    eval 'sub E1000_STATUS_FUNC_MASK () {0xc;}' unless defined(&E1000_STATUS_FUNC_MASK);
    eval 'sub E1000_STATUS_FUNC_SHIFT () {2;}' unless defined(&E1000_STATUS_FUNC_SHIFT);
    eval 'sub E1000_STATUS_FUNC_0 () {0x;}' unless defined(&E1000_STATUS_FUNC_0);
    eval 'sub E1000_STATUS_FUNC_1 () {0x4;}' unless defined(&E1000_STATUS_FUNC_1);
    eval 'sub E1000_STATUS_TXOFF () {0x10;}' unless defined(&E1000_STATUS_TXOFF);
    eval 'sub E1000_STATUS_TBIMODE () {0x20;}' unless defined(&E1000_STATUS_TBIMODE);
    eval 'sub E1000_STATUS_SPEED_MASK () {0xc0;}' unless defined(&E1000_STATUS_SPEED_MASK);
    eval 'sub E1000_STATUS_SPEED_10 () {0x;}' unless defined(&E1000_STATUS_SPEED_10);
    eval 'sub E1000_STATUS_SPEED_100 () {0x40;}' unless defined(&E1000_STATUS_SPEED_100);
    eval 'sub E1000_STATUS_SPEED_1000 () {0x80;}' unless defined(&E1000_STATUS_SPEED_1000);
    eval 'sub E1000_STATUS_LAN_INIT_DONE () {0x200;}' unless defined(&E1000_STATUS_LAN_INIT_DONE);
    eval 'sub E1000_STATUS_ASDV () {0x300;}' unless defined(&E1000_STATUS_ASDV);
    eval 'sub E1000_STATUS_DOCK_CI () {0x800;}' unless defined(&E1000_STATUS_DOCK_CI);
    eval 'sub E1000_STATUS_GIO_MASTER_ENABLE () {0x80000;}' unless defined(&E1000_STATUS_GIO_MASTER_ENABLE);
    eval 'sub E1000_STATUS_MTXCKOK () {0x400;}' unless defined(&E1000_STATUS_MTXCKOK);
    eval 'sub E1000_STATUS_PCI66 () {0x800;}' unless defined(&E1000_STATUS_PCI66);
    eval 'sub E1000_STATUS_BUS64 () {0x1000;}' unless defined(&E1000_STATUS_BUS64);
    eval 'sub E1000_STATUS_PCIX_MODE () {0x2000;}' unless defined(&E1000_STATUS_PCIX_MODE);
    eval 'sub E1000_STATUS_PCIX_SPEED () {0xc000;}' unless defined(&E1000_STATUS_PCIX_SPEED);
    eval 'sub E1000_STATUS_BMC_SKU_0 () {0x100000;}' unless defined(&E1000_STATUS_BMC_SKU_0);
    eval 'sub E1000_STATUS_BMC_SKU_1 () {0x200000;}' unless defined(&E1000_STATUS_BMC_SKU_1);
    eval 'sub E1000_STATUS_BMC_SKU_2 () {0x400000;}' unless defined(&E1000_STATUS_BMC_SKU_2);
    eval 'sub E1000_STATUS_BMC_CRYPTO () {0x800000;}' unless defined(&E1000_STATUS_BMC_CRYPTO);
    eval 'sub E1000_STATUS_BMC_LITE () {0x1000000;}' unless defined(&E1000_STATUS_BMC_LITE);
    eval 'sub E1000_STATUS_RGMII_ENABLE () {0x2000000;}' unless defined(&E1000_STATUS_RGMII_ENABLE);
    eval 'sub E1000_STATUS_FUSE_8 () {0x4000000;}' unless defined(&E1000_STATUS_FUSE_8);
    eval 'sub E1000_STATUS_FUSE_9 () {0x8000000;}' unless defined(&E1000_STATUS_FUSE_9);
    eval 'sub E1000_STATUS_SERDES0_DIS () {0x10000000;}' unless defined(&E1000_STATUS_SERDES0_DIS);
    eval 'sub E1000_STATUS_SERDES1_DIS () {0x20000000;}' unless defined(&E1000_STATUS_SERDES1_DIS);
    eval 'sub E1000_STATUS_PCIX_SPEED_66 () {0x;}' unless defined(&E1000_STATUS_PCIX_SPEED_66);
    eval 'sub E1000_STATUS_PCIX_SPEED_100 () {0x4000;}' unless defined(&E1000_STATUS_PCIX_SPEED_100);
    eval 'sub E1000_STATUS_PCIX_SPEED_133 () {0x8000;}' unless defined(&E1000_STATUS_PCIX_SPEED_133);
    eval 'sub E1000_EECD_SK () {0x1;}' unless defined(&E1000_EECD_SK);
    eval 'sub E1000_EECD_CS () {0x2;}' unless defined(&E1000_EECD_CS);
    eval 'sub E1000_EECD_DI () {0x4;}' unless defined(&E1000_EECD_DI);
    eval 'sub E1000_EECD_DO () {0x8;}' unless defined(&E1000_EECD_DO);
    eval 'sub E1000_EECD_FWE_MASK () {0x30;}' unless defined(&E1000_EECD_FWE_MASK);
    eval 'sub E1000_EECD_FWE_DIS () {0x10;}' unless defined(&E1000_EECD_FWE_DIS);
    eval 'sub E1000_EECD_FWE_EN () {0x20;}' unless defined(&E1000_EECD_FWE_EN);
    eval 'sub E1000_EECD_FWE_SHIFT () {4;}' unless defined(&E1000_EECD_FWE_SHIFT);
    eval 'sub E1000_EECD_REQ () {0x40;}' unless defined(&E1000_EECD_REQ);
    eval 'sub E1000_EECD_GNT () {0x80;}' unless defined(&E1000_EECD_GNT);
    eval 'sub E1000_EECD_PRES () {0x100;}' unless defined(&E1000_EECD_PRES);
    eval 'sub E1000_EECD_SIZE () {0x200;}' unless defined(&E1000_EECD_SIZE);
    eval 'sub E1000_EECD_ADDR_BITS () {0x400;}' unless defined(&E1000_EECD_ADDR_BITS);
    eval 'sub E1000_EECD_TYPE () {0x2000;}' unless defined(&E1000_EECD_TYPE);
    unless(defined(&E1000_EEPROM_GRANT_ATTEMPTS)) {
	eval 'sub E1000_EEPROM_GRANT_ATTEMPTS () {1000;}' unless defined(&E1000_EEPROM_GRANT_ATTEMPTS);
    }
    eval 'sub E1000_EECD_AUTO_RD () {0x200;}' unless defined(&E1000_EECD_AUTO_RD);
    eval 'sub E1000_EECD_SIZE_EX_MASK () {0x7800;}' unless defined(&E1000_EECD_SIZE_EX_MASK);
    eval 'sub E1000_EECD_SIZE_EX_SHIFT () {11;}' unless defined(&E1000_EECD_SIZE_EX_SHIFT);
    eval 'sub E1000_EECD_NVADDS () {0x18000;}' unless defined(&E1000_EECD_NVADDS);
    eval 'sub E1000_EECD_SELSHAD () {0x20000;}' unless defined(&E1000_EECD_SELSHAD);
    eval 'sub E1000_EECD_INITSRAM () {0x40000;}' unless defined(&E1000_EECD_INITSRAM);
    eval 'sub E1000_EECD_FLUPD () {0x80000;}' unless defined(&E1000_EECD_FLUPD);
    eval 'sub E1000_EECD_AUPDEN () {0x100000;}' unless defined(&E1000_EECD_AUPDEN);
    eval 'sub E1000_EECD_SHADV () {0x200000;}' unless defined(&E1000_EECD_SHADV);
    eval 'sub E1000_EECD_SEC1VAL () {0x400000;}' unless defined(&E1000_EECD_SEC1VAL);
    eval 'sub E1000_EECD_SECVAL_SHIFT () {22;}' unless defined(&E1000_EECD_SECVAL_SHIFT);
    eval 'sub E1000_STM_OPCODE () {0xdb00;}' unless defined(&E1000_STM_OPCODE);
    eval 'sub E1000_HICR_FW_RESET () {0xc0;}' unless defined(&E1000_HICR_FW_RESET);
    eval 'sub E1000_SHADOW_RAM_WORDS () {2048;}' unless defined(&E1000_SHADOW_RAM_WORDS);
    eval 'sub E1000_ICH_NVM_SIG_WORD () {0x13;}' unless defined(&E1000_ICH_NVM_SIG_WORD);
    eval 'sub E1000_ICH_NVM_SIG_MASK () {0xc0;}' unless defined(&E1000_ICH_NVM_SIG_MASK);
    eval 'sub E1000_EERD_START () {0x1;}' unless defined(&E1000_EERD_START);
    eval 'sub E1000_EERD_DONE () {0x10;}' unless defined(&E1000_EERD_DONE);
    eval 'sub E1000_EERD_ADDR_SHIFT () {8;}' unless defined(&E1000_EERD_ADDR_SHIFT);
    eval 'sub E1000_EERD_ADDR_MASK () {0xff00;}' unless defined(&E1000_EERD_ADDR_MASK);
    eval 'sub E1000_EERD_DATA_SHIFT () {16;}' unless defined(&E1000_EERD_DATA_SHIFT);
    eval 'sub E1000_EERD_DATA_MASK () {0xffff0000;}' unless defined(&E1000_EERD_DATA_MASK);
    eval 'sub EEPROM_STATUS_RDY_SPI () {0x1;}' unless defined(&EEPROM_STATUS_RDY_SPI);
    eval 'sub EEPROM_STATUS_WEN_SPI () {0x2;}' unless defined(&EEPROM_STATUS_WEN_SPI);
    eval 'sub EEPROM_STATUS_BP0_SPI () {0x4;}' unless defined(&EEPROM_STATUS_BP0_SPI);
    eval 'sub EEPROM_STATUS_BP1_SPI () {0x8;}' unless defined(&EEPROM_STATUS_BP1_SPI);
    eval 'sub EEPROM_STATUS_WPEN_SPI () {0x80;}' unless defined(&EEPROM_STATUS_WPEN_SPI);
    eval 'sub E1000_CTRL_EXT_GPI0_EN () {0x1;}' unless defined(&E1000_CTRL_EXT_GPI0_EN);
    eval 'sub E1000_CTRL_EXT_GPI1_EN () {0x2;}' unless defined(&E1000_CTRL_EXT_GPI1_EN);
    eval 'sub E1000_CTRL_EXT_PHYINT_EN () { &E1000_CTRL_EXT_GPI1_EN;}' unless defined(&E1000_CTRL_EXT_PHYINT_EN);
    eval 'sub E1000_CTRL_EXT_GPI2_EN () {0x4;}' unless defined(&E1000_CTRL_EXT_GPI2_EN);
    eval 'sub E1000_CTRL_EXT_GPI3_EN () {0x8;}' unless defined(&E1000_CTRL_EXT_GPI3_EN);
    eval 'sub E1000_CTRL_EXT_SDP4_DATA () {0x10;}' unless defined(&E1000_CTRL_EXT_SDP4_DATA);
    eval 'sub E1000_CTRL_EXT_SDP5_DATA () {0x20;}' unless defined(&E1000_CTRL_EXT_SDP5_DATA);
    eval 'sub E1000_CTRL_EXT_PHY_INT () { &E1000_CTRL_EXT_SDP5_DATA;}' unless defined(&E1000_CTRL_EXT_PHY_INT);
    eval 'sub E1000_CTRL_EXT_SDP6_DATA () {0x40;}' unless defined(&E1000_CTRL_EXT_SDP6_DATA);
    eval 'sub E1000_CTRL_EXT_SDP7_DATA () {0x80;}' unless defined(&E1000_CTRL_EXT_SDP7_DATA);
    eval 'sub E1000_CTRL_EXT_SDP4_DIR () {0x100;}' unless defined(&E1000_CTRL_EXT_SDP4_DIR);
    eval 'sub E1000_CTRL_EXT_SDP5_DIR () {0x200;}' unless defined(&E1000_CTRL_EXT_SDP5_DIR);
    eval 'sub E1000_CTRL_EXT_SDP6_DIR () {0x400;}' unless defined(&E1000_CTRL_EXT_SDP6_DIR);
    eval 'sub E1000_CTRL_EXT_SDP7_DIR () {0x800;}' unless defined(&E1000_CTRL_EXT_SDP7_DIR);
    eval 'sub E1000_CTRL_EXT_ASDCHK () {0x1000;}' unless defined(&E1000_CTRL_EXT_ASDCHK);
    eval 'sub E1000_CTRL_EXT_EE_RST () {0x2000;}' unless defined(&E1000_CTRL_EXT_EE_RST);
    eval 'sub E1000_CTRL_EXT_IPS () {0x4000;}' unless defined(&E1000_CTRL_EXT_IPS);
    eval 'sub E1000_CTRL_EXT_SPD_BYPS () {0x8000;}' unless defined(&E1000_CTRL_EXT_SPD_BYPS);
    eval 'sub E1000_CTRL_EXT_RO_DIS () {0x20000;}' unless defined(&E1000_CTRL_EXT_RO_DIS);
    eval 'sub E1000_CTRL_EXT_LINK_MODE_MASK () {0xc00000;}' unless defined(&E1000_CTRL_EXT_LINK_MODE_MASK);
    eval 'sub E1000_CTRL_EXT_LINK_MODE_GMII () {0x;}' unless defined(&E1000_CTRL_EXT_LINK_MODE_GMII);
    eval 'sub E1000_CTRL_EXT_LINK_MODE_TBI () {0xc00000;}' unless defined(&E1000_CTRL_EXT_LINK_MODE_TBI);
    eval 'sub E1000_CTRL_EXT_LINK_MODE_KMRN () {0x;}' unless defined(&E1000_CTRL_EXT_LINK_MODE_KMRN);
    eval 'sub E1000_CTRL_EXT_LINK_MODE_SERDES () {0xc00000;}' unless defined(&E1000_CTRL_EXT_LINK_MODE_SERDES);
    eval 'sub E1000_CTRL_EXT_LINK_MODE_SGMII () {0x800000;}' unless defined(&E1000_CTRL_EXT_LINK_MODE_SGMII);
    eval 'sub E1000_CTRL_EXT_WR_WMARK_MASK () {0x3000000;}' unless defined(&E1000_CTRL_EXT_WR_WMARK_MASK);
    eval 'sub E1000_CTRL_EXT_WR_WMARK_256 () {0x;}' unless defined(&E1000_CTRL_EXT_WR_WMARK_256);
    eval 'sub E1000_CTRL_EXT_WR_WMARK_320 () {0x1000000;}' unless defined(&E1000_CTRL_EXT_WR_WMARK_320);
    eval 'sub E1000_CTRL_EXT_WR_WMARK_384 () {0x2000000;}' unless defined(&E1000_CTRL_EXT_WR_WMARK_384);
    eval 'sub E1000_CTRL_EXT_WR_WMARK_448 () {0x3000000;}' unless defined(&E1000_CTRL_EXT_WR_WMARK_448);
    eval 'sub E1000_CTRL_EXT_DRV_LOAD () {0x10000000;}' unless defined(&E1000_CTRL_EXT_DRV_LOAD);
    eval 'sub E1000_CTRL_EXT_IAME () {0x8000000;}' unless defined(&E1000_CTRL_EXT_IAME);
    eval 'sub E1000_CTRL_EXT_INT_TIMER_CLR () {0x20000000;}' unless defined(&E1000_CTRL_EXT_INT_TIMER_CLR);
    eval 'sub E1000_CRTL_EXT_PB_PAREN () {0x1000000;}' unless defined(&E1000_CRTL_EXT_PB_PAREN);
    eval 'sub E1000_CTRL_EXT_DF_PAREN () {0x2000000;}' unless defined(&E1000_CTRL_EXT_DF_PAREN);
    eval 'sub E1000_CTRL_EXT_GHOST_PAREN () {0x40000000;}' unless defined(&E1000_CTRL_EXT_GHOST_PAREN);
    eval 'sub E1000_MDIC_DATA_MASK () {0xffff;}' unless defined(&E1000_MDIC_DATA_MASK);
    eval 'sub E1000_MDIC_REG_MASK () {0x1f0000;}' unless defined(&E1000_MDIC_REG_MASK);
    eval 'sub E1000_MDIC_REG_SHIFT () {16;}' unless defined(&E1000_MDIC_REG_SHIFT);
    eval 'sub E1000_MDIC_PHY_MASK () {0x3e00000;}' unless defined(&E1000_MDIC_PHY_MASK);
    eval 'sub E1000_MDIC_PHY_SHIFT () {21;}' unless defined(&E1000_MDIC_PHY_SHIFT);
    eval 'sub E1000_MDIC_OP_WRITE () {0x4000000;}' unless defined(&E1000_MDIC_OP_WRITE);
    eval 'sub E1000_MDIC_OP_READ () {0x8000000;}' unless defined(&E1000_MDIC_OP_READ);
    eval 'sub E1000_MDIC_READY () {0x10000000;}' unless defined(&E1000_MDIC_READY);
    eval 'sub E1000_MDIC_INT_EN () {0x20000000;}' unless defined(&E1000_MDIC_INT_EN);
    eval 'sub E1000_MDIC_ERROR () {0x40000000;}' unless defined(&E1000_MDIC_ERROR);
    eval 'sub E1000_KUMCTRLSTA_MASK () {0xffff;}' unless defined(&E1000_KUMCTRLSTA_MASK);
    eval 'sub E1000_KUMCTRLSTA_OFFSET () {0x1f0000;}' unless defined(&E1000_KUMCTRLSTA_OFFSET);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_SHIFT () {16;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_SHIFT);
    eval 'sub E1000_KUMCTRLSTA_REN () {0x200000;}' unless defined(&E1000_KUMCTRLSTA_REN);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_FIFO_CTRL () {0x;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_FIFO_CTRL);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_CTRL () {0x1;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_CTRL);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_INB_CTRL () {0x2;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_INB_CTRL);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_DIAG () {0x3;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_DIAG);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_TIMEOUTS () {0x4;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_TIMEOUTS);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_INB_PARAM () {0x9;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_INB_PARAM);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_HD_CTRL () {0x10;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_HD_CTRL);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_M2P_SERDES () {0x1e;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_M2P_SERDES);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_M2P_MODES () {0x1f;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_M2P_MODES);
    eval 'sub E1000_KUMCTRLSTA_FIFO_CTRL_RX_BYPASS () {0x8;}' unless defined(&E1000_KUMCTRLSTA_FIFO_CTRL_RX_BYPASS);
    eval 'sub E1000_KUMCTRLSTA_FIFO_CTRL_TX_BYPASS () {0x800;}' unless defined(&E1000_KUMCTRLSTA_FIFO_CTRL_TX_BYPASS);
    eval 'sub E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT () {0x500;}' unless defined(&E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT);
    eval 'sub E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING () {0x10;}' unless defined(&E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING);
    eval 'sub E1000_KUMCTRLSTA_HD_CTRL_10_100_DEFAULT () {0x4;}' unless defined(&E1000_KUMCTRLSTA_HD_CTRL_10_100_DEFAULT);
    eval 'sub E1000_KUMCTRLSTA_HD_CTRL_1000_DEFAULT () {0x;}' unless defined(&E1000_KUMCTRLSTA_HD_CTRL_1000_DEFAULT);
    eval 'sub E1000_KUMCTRLSTA_OFFSET_K0S_CTRL () {0x1e;}' unless defined(&E1000_KUMCTRLSTA_OFFSET_K0S_CTRL);
    eval 'sub E1000_KUMCTRLSTA_DIAG_FELPBK () {0x2000;}' unless defined(&E1000_KUMCTRLSTA_DIAG_FELPBK);
    eval 'sub E1000_KUMCTRLSTA_DIAG_NELPBK () {0x1000;}' unless defined(&E1000_KUMCTRLSTA_DIAG_NELPBK);
    eval 'sub E1000_KUMCTRLSTA_K0S_100_EN () {0x2000;}' unless defined(&E1000_KUMCTRLSTA_K0S_100_EN);
    eval 'sub E1000_KUMCTRLSTA_K0S_GBE_EN () {0x1000;}' unless defined(&E1000_KUMCTRLSTA_K0S_GBE_EN);
    eval 'sub E1000_KUMCTRLSTA_K0S_ENTRY_LATENCY_MASK () {0x3;}' unless defined(&E1000_KUMCTRLSTA_K0S_ENTRY_LATENCY_MASK);
    eval 'sub E1000_KABGTXD_BGSQLBIAS () {0x50000;}' unless defined(&E1000_KABGTXD_BGSQLBIAS);
    eval 'sub E1000_PHY_CTRL_SPD_EN () {0x1;}' unless defined(&E1000_PHY_CTRL_SPD_EN);
    eval 'sub E1000_PHY_CTRL_D0A_LPLU () {0x2;}' unless defined(&E1000_PHY_CTRL_D0A_LPLU);
    eval 'sub E1000_PHY_CTRL_NOND0A_LPLU () {0x4;}' unless defined(&E1000_PHY_CTRL_NOND0A_LPLU);
    eval 'sub E1000_PHY_CTRL_NOND0A_GBE_DISABLE () {0x8;}' unless defined(&E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
    eval 'sub E1000_PHY_CTRL_GBE_DISABLE () {0x40;}' unless defined(&E1000_PHY_CTRL_GBE_DISABLE);
    eval 'sub E1000_PHY_CTRL_B2B_EN () {0x80;}' unless defined(&E1000_PHY_CTRL_B2B_EN);
    eval 'sub E1000_LEDCTL_LED0_MODE_MASK () {0xf;}' unless defined(&E1000_LEDCTL_LED0_MODE_MASK);
    eval 'sub E1000_LEDCTL_LED0_MODE_SHIFT () {0;}' unless defined(&E1000_LEDCTL_LED0_MODE_SHIFT);
    eval 'sub E1000_LEDCTL_LED0_BLINK_RATE () {0x20;}' unless defined(&E1000_LEDCTL_LED0_BLINK_RATE);
    eval 'sub E1000_LEDCTL_LED0_IVRT () {0x40;}' unless defined(&E1000_LEDCTL_LED0_IVRT);
    eval 'sub E1000_LEDCTL_LED0_BLINK () {0x80;}' unless defined(&E1000_LEDCTL_LED0_BLINK);
    eval 'sub E1000_LEDCTL_LED1_MODE_MASK () {0xf00;}' unless defined(&E1000_LEDCTL_LED1_MODE_MASK);
    eval 'sub E1000_LEDCTL_LED1_MODE_SHIFT () {8;}' unless defined(&E1000_LEDCTL_LED1_MODE_SHIFT);
    eval 'sub E1000_LEDCTL_LED1_BLINK_RATE () {0x2000;}' unless defined(&E1000_LEDCTL_LED1_BLINK_RATE);
    eval 'sub E1000_LEDCTL_LED1_IVRT () {0x4000;}' unless defined(&E1000_LEDCTL_LED1_IVRT);
    eval 'sub E1000_LEDCTL_LED1_BLINK () {0x8000;}' unless defined(&E1000_LEDCTL_LED1_BLINK);
    eval 'sub E1000_LEDCTL_LED2_MODE_MASK () {0xf0000;}' unless defined(&E1000_LEDCTL_LED2_MODE_MASK);
    eval 'sub E1000_LEDCTL_LED2_MODE_SHIFT () {16;}' unless defined(&E1000_LEDCTL_LED2_MODE_SHIFT);
    eval 'sub E1000_LEDCTL_LED2_BLINK_RATE () {0x200000;}' unless defined(&E1000_LEDCTL_LED2_BLINK_RATE);
    eval 'sub E1000_LEDCTL_LED2_IVRT () {0x400000;}' unless defined(&E1000_LEDCTL_LED2_IVRT);
    eval 'sub E1000_LEDCTL_LED2_BLINK () {0x800000;}' unless defined(&E1000_LEDCTL_LED2_BLINK);
    eval 'sub E1000_LEDCTL_LED3_MODE_MASK () {0xf000000;}' unless defined(&E1000_LEDCTL_LED3_MODE_MASK);
    eval 'sub E1000_LEDCTL_LED3_MODE_SHIFT () {24;}' unless defined(&E1000_LEDCTL_LED3_MODE_SHIFT);
    eval 'sub E1000_LEDCTL_LED3_BLINK_RATE () {0x20000000;}' unless defined(&E1000_LEDCTL_LED3_BLINK_RATE);
    eval 'sub E1000_LEDCTL_LED3_IVRT () {0x40000000;}' unless defined(&E1000_LEDCTL_LED3_IVRT);
    eval 'sub E1000_LEDCTL_LED3_BLINK () {0x80000000;}' unless defined(&E1000_LEDCTL_LED3_BLINK);
    eval 'sub E1000_LEDCTL_MODE_LINK_10_1000 () {0x;}' unless defined(&E1000_LEDCTL_MODE_LINK_10_1000);
    eval 'sub E1000_LEDCTL_MODE_LINK_100_1000 () {0x1;}' unless defined(&E1000_LEDCTL_MODE_LINK_100_1000);
    eval 'sub E1000_LEDCTL_MODE_LINK_UP () {0x2;}' unless defined(&E1000_LEDCTL_MODE_LINK_UP);
    eval 'sub E1000_LEDCTL_MODE_ACTIVITY () {0x3;}' unless defined(&E1000_LEDCTL_MODE_ACTIVITY);
    eval 'sub E1000_LEDCTL_MODE_LINK_ACTIVITY () {0x4;}' unless defined(&E1000_LEDCTL_MODE_LINK_ACTIVITY);
    eval 'sub E1000_LEDCTL_MODE_LINK_10 () {0x5;}' unless defined(&E1000_LEDCTL_MODE_LINK_10);
    eval 'sub E1000_LEDCTL_MODE_LINK_100 () {0x6;}' unless defined(&E1000_LEDCTL_MODE_LINK_100);
    eval 'sub E1000_LEDCTL_MODE_LINK_1000 () {0x7;}' unless defined(&E1000_LEDCTL_MODE_LINK_1000);
    eval 'sub E1000_LEDCTL_MODE_PCIX_MODE () {0x8;}' unless defined(&E1000_LEDCTL_MODE_PCIX_MODE);
    eval 'sub E1000_LEDCTL_MODE_FULL_DUPLEX () {0x9;}' unless defined(&E1000_LEDCTL_MODE_FULL_DUPLEX);
    eval 'sub E1000_LEDCTL_MODE_COLLISION () {0xa;}' unless defined(&E1000_LEDCTL_MODE_COLLISION);
    eval 'sub E1000_LEDCTL_MODE_BUS_SPEED () {0xb;}' unless defined(&E1000_LEDCTL_MODE_BUS_SPEED);
    eval 'sub E1000_LEDCTL_MODE_BUS_SIZE () {0xc;}' unless defined(&E1000_LEDCTL_MODE_BUS_SIZE);
    eval 'sub E1000_LEDCTL_MODE_PAUSED () {0xd;}' unless defined(&E1000_LEDCTL_MODE_PAUSED);
    eval 'sub E1000_LEDCTL_MODE_LED_ON () {0xe;}' unless defined(&E1000_LEDCTL_MODE_LED_ON);
    eval 'sub E1000_LEDCTL_MODE_LED_OFF () {0xf;}' unless defined(&E1000_LEDCTL_MODE_LED_OFF);
    eval 'sub E1000_RAH_AV () {0x80000000;}' unless defined(&E1000_RAH_AV);
    eval 'sub E1000_ICR_TXDW () {0x1;}' unless defined(&E1000_ICR_TXDW);
    eval 'sub E1000_ICR_TXQE () {0x2;}' unless defined(&E1000_ICR_TXQE);
    eval 'sub E1000_ICR_LSC () {0x4;}' unless defined(&E1000_ICR_LSC);
    eval 'sub E1000_ICR_RXSEQ () {0x8;}' unless defined(&E1000_ICR_RXSEQ);
    eval 'sub E1000_ICR_RXDMT0 () {0x10;}' unless defined(&E1000_ICR_RXDMT0);
    eval 'sub E1000_ICR_RXO () {0x40;}' unless defined(&E1000_ICR_RXO);
    eval 'sub E1000_ICR_RXT0 () {0x80;}' unless defined(&E1000_ICR_RXT0);
    eval 'sub E1000_ICR_MDAC () {0x200;}' unless defined(&E1000_ICR_MDAC);
    eval 'sub E1000_ICR_RXCFG () {0x400;}' unless defined(&E1000_ICR_RXCFG);
    eval 'sub E1000_ICR_GPI_EN0 () {0x800;}' unless defined(&E1000_ICR_GPI_EN0);
    eval 'sub E1000_ICR_GPI_EN1 () {0x1000;}' unless defined(&E1000_ICR_GPI_EN1);
    eval 'sub E1000_ICR_GPI_EN2 () {0x2000;}' unless defined(&E1000_ICR_GPI_EN2);
    eval 'sub E1000_ICR_GPI_EN3 () {0x4000;}' unless defined(&E1000_ICR_GPI_EN3);
    eval 'sub E1000_ICR_TXD_LOW () {0x8000;}' unless defined(&E1000_ICR_TXD_LOW);
    eval 'sub E1000_ICR_SRPD () {0x10000;}' unless defined(&E1000_ICR_SRPD);
    eval 'sub E1000_ICR_ACK () {0x20000;}' unless defined(&E1000_ICR_ACK);
    eval 'sub E1000_ICR_MNG () {0x40000;}' unless defined(&E1000_ICR_MNG);
    eval 'sub E1000_ICR_DOCK () {0x80000;}' unless defined(&E1000_ICR_DOCK);
    eval 'sub E1000_ICR_INT_ASSERTED () {0x80000000;}' unless defined(&E1000_ICR_INT_ASSERTED);
    eval 'sub E1000_ICR_RXD_FIFO_PAR0 () {0x100000;}' unless defined(&E1000_ICR_RXD_FIFO_PAR0);
    eval 'sub E1000_ICR_TXD_FIFO_PAR0 () {0x200000;}' unless defined(&E1000_ICR_TXD_FIFO_PAR0);
    eval 'sub E1000_ICR_HOST_ARB_PAR () {0x400000;}' unless defined(&E1000_ICR_HOST_ARB_PAR);
    eval 'sub E1000_ICR_PB_PAR () {0x800000;}' unless defined(&E1000_ICR_PB_PAR);
    eval 'sub E1000_ICR_RXD_FIFO_PAR1 () {0x1000000;}' unless defined(&E1000_ICR_RXD_FIFO_PAR1);
    eval 'sub E1000_ICR_TXD_FIFO_PAR1 () {0x2000000;}' unless defined(&E1000_ICR_TXD_FIFO_PAR1);
    eval 'sub E1000_ICR_ALL_PARITY () {0x3f00000;}' unless defined(&E1000_ICR_ALL_PARITY);
    eval 'sub E1000_ICR_DSW () {0x20;}' unless defined(&E1000_ICR_DSW);
    eval 'sub E1000_ICR_PHYINT () {0x1000;}' unless defined(&E1000_ICR_PHYINT);
    eval 'sub E1000_ICR_EPRST () {0x100000;}' unless defined(&E1000_ICR_EPRST);
    eval 'sub E1000_ICS_TXDW () { &E1000_ICR_TXDW;}' unless defined(&E1000_ICS_TXDW);
    eval 'sub E1000_ICS_TXQE () { &E1000_ICR_TXQE;}' unless defined(&E1000_ICS_TXQE);
    eval 'sub E1000_ICS_LSC () { &E1000_ICR_LSC;}' unless defined(&E1000_ICS_LSC);
    eval 'sub E1000_ICS_RXSEQ () { &E1000_ICR_RXSEQ;}' unless defined(&E1000_ICS_RXSEQ);
    eval 'sub E1000_ICS_RXDMT0 () { &E1000_ICR_RXDMT0;}' unless defined(&E1000_ICS_RXDMT0);
    eval 'sub E1000_ICS_RXO () { &E1000_ICR_RXO;}' unless defined(&E1000_ICS_RXO);
    eval 'sub E1000_ICS_RXT0 () { &E1000_ICR_RXT0;}' unless defined(&E1000_ICS_RXT0);
    eval 'sub E1000_ICS_MDAC () { &E1000_ICR_MDAC;}' unless defined(&E1000_ICS_MDAC);
    eval 'sub E1000_ICS_RXCFG () { &E1000_ICR_RXCFG;}' unless defined(&E1000_ICS_RXCFG);
    eval 'sub E1000_ICS_GPI_EN0 () { &E1000_ICR_GPI_EN0;}' unless defined(&E1000_ICS_GPI_EN0);
    eval 'sub E1000_ICS_GPI_EN1 () { &E1000_ICR_GPI_EN1;}' unless defined(&E1000_ICS_GPI_EN1);
    eval 'sub E1000_ICS_GPI_EN2 () { &E1000_ICR_GPI_EN2;}' unless defined(&E1000_ICS_GPI_EN2);
    eval 'sub E1000_ICS_GPI_EN3 () { &E1000_ICR_GPI_EN3;}' unless defined(&E1000_ICS_GPI_EN3);
    eval 'sub E1000_ICS_TXD_LOW () { &E1000_ICR_TXD_LOW;}' unless defined(&E1000_ICS_TXD_LOW);
    eval 'sub E1000_ICS_SRPD () { &E1000_ICR_SRPD;}' unless defined(&E1000_ICS_SRPD);
    eval 'sub E1000_ICS_ACK () { &E1000_ICR_ACK;}' unless defined(&E1000_ICS_ACK);
    eval 'sub E1000_ICS_MNG () { &E1000_ICR_MNG;}' unless defined(&E1000_ICS_MNG);
    eval 'sub E1000_ICS_DOCK () { &E1000_ICR_DOCK;}' unless defined(&E1000_ICS_DOCK);
    eval 'sub E1000_ICS_RXD_FIFO_PAR0 () { &E1000_ICR_RXD_FIFO_PAR0;}' unless defined(&E1000_ICS_RXD_FIFO_PAR0);
    eval 'sub E1000_ICS_TXD_FIFO_PAR0 () { &E1000_ICR_TXD_FIFO_PAR0;}' unless defined(&E1000_ICS_TXD_FIFO_PAR0);
    eval 'sub E1000_ICS_HOST_ARB_PAR () { &E1000_ICR_HOST_ARB_PAR;}' unless defined(&E1000_ICS_HOST_ARB_PAR);
    eval 'sub E1000_ICS_PB_PAR () { &E1000_ICR_PB_PAR;}' unless defined(&E1000_ICS_PB_PAR);
    eval 'sub E1000_ICS_RXD_FIFO_PAR1 () { &E1000_ICR_RXD_FIFO_PAR1;}' unless defined(&E1000_ICS_RXD_FIFO_PAR1);
    eval 'sub E1000_ICS_TXD_FIFO_PAR1 () { &E1000_ICR_TXD_FIFO_PAR1;}' unless defined(&E1000_ICS_TXD_FIFO_PAR1);
    eval 'sub E1000_ICS_DSW () { &E1000_ICR_DSW;}' unless defined(&E1000_ICS_DSW);
    eval 'sub E1000_ICS_PHYINT () { &E1000_ICR_PHYINT;}' unless defined(&E1000_ICS_PHYINT);
    eval 'sub E1000_ICS_EPRST () { &E1000_ICR_EPRST;}' unless defined(&E1000_ICS_EPRST);
    eval 'sub E1000_IMS_TXDW () { &E1000_ICR_TXDW;}' unless defined(&E1000_IMS_TXDW);
    eval 'sub E1000_IMS_TXQE () { &E1000_ICR_TXQE;}' unless defined(&E1000_IMS_TXQE);
    eval 'sub E1000_IMS_LSC () { &E1000_ICR_LSC;}' unless defined(&E1000_IMS_LSC);
    eval 'sub E1000_IMS_RXSEQ () { &E1000_ICR_RXSEQ;}' unless defined(&E1000_IMS_RXSEQ);
    eval 'sub E1000_IMS_RXDMT0 () { &E1000_ICR_RXDMT0;}' unless defined(&E1000_IMS_RXDMT0);
    eval 'sub E1000_IMS_RXO () { &E1000_ICR_RXO;}' unless defined(&E1000_IMS_RXO);
    eval 'sub E1000_IMS_RXT0 () { &E1000_ICR_RXT0;}' unless defined(&E1000_IMS_RXT0);
    eval 'sub E1000_IMS_MDAC () { &E1000_ICR_MDAC;}' unless defined(&E1000_IMS_MDAC);
    eval 'sub E1000_IMS_RXCFG () { &E1000_ICR_RXCFG;}' unless defined(&E1000_IMS_RXCFG);
    eval 'sub E1000_IMS_GPI_EN0 () { &E1000_ICR_GPI_EN0;}' unless defined(&E1000_IMS_GPI_EN0);
    eval 'sub E1000_IMS_GPI_EN1 () { &E1000_ICR_GPI_EN1;}' unless defined(&E1000_IMS_GPI_EN1);
    eval 'sub E1000_IMS_GPI_EN2 () { &E1000_ICR_GPI_EN2;}' unless defined(&E1000_IMS_GPI_EN2);
    eval 'sub E1000_IMS_GPI_EN3 () { &E1000_ICR_GPI_EN3;}' unless defined(&E1000_IMS_GPI_EN3);
    eval 'sub E1000_IMS_TXD_LOW () { &E1000_ICR_TXD_LOW;}' unless defined(&E1000_IMS_TXD_LOW);
    eval 'sub E1000_IMS_SRPD () { &E1000_ICR_SRPD;}' unless defined(&E1000_IMS_SRPD);
    eval 'sub E1000_IMS_ACK () { &E1000_ICR_ACK;}' unless defined(&E1000_IMS_ACK);
    eval 'sub E1000_IMS_MNG () { &E1000_ICR_MNG;}' unless defined(&E1000_IMS_MNG);
    eval 'sub E1000_IMS_DOCK () { &E1000_ICR_DOCK;}' unless defined(&E1000_IMS_DOCK);
    eval 'sub E1000_IMS_RXD_FIFO_PAR0 () { &E1000_ICR_RXD_FIFO_PAR0;}' unless defined(&E1000_IMS_RXD_FIFO_PAR0);
    eval 'sub E1000_IMS_TXD_FIFO_PAR0 () { &E1000_ICR_TXD_FIFO_PAR0;}' unless defined(&E1000_IMS_TXD_FIFO_PAR0);
    eval 'sub E1000_IMS_HOST_ARB_PAR () { &E1000_ICR_HOST_ARB_PAR;}' unless defined(&E1000_IMS_HOST_ARB_PAR);
    eval 'sub E1000_IMS_PB_PAR () { &E1000_ICR_PB_PAR;}' unless defined(&E1000_IMS_PB_PAR);
    eval 'sub E1000_IMS_RXD_FIFO_PAR1 () { &E1000_ICR_RXD_FIFO_PAR1;}' unless defined(&E1000_IMS_RXD_FIFO_PAR1);
    eval 'sub E1000_IMS_TXD_FIFO_PAR1 () { &E1000_ICR_TXD_FIFO_PAR1;}' unless defined(&E1000_IMS_TXD_FIFO_PAR1);
    eval 'sub E1000_IMS_DSW () { &E1000_ICR_DSW;}' unless defined(&E1000_IMS_DSW);
    eval 'sub E1000_IMS_PHYINT () { &E1000_ICR_PHYINT;}' unless defined(&E1000_IMS_PHYINT);
    eval 'sub E1000_IMS_EPRST () { &E1000_ICR_EPRST;}' unless defined(&E1000_IMS_EPRST);
    eval 'sub E1000_IMC_TXDW () { &E1000_ICR_TXDW;}' unless defined(&E1000_IMC_TXDW);
    eval 'sub E1000_IMC_TXQE () { &E1000_ICR_TXQE;}' unless defined(&E1000_IMC_TXQE);
    eval 'sub E1000_IMC_LSC () { &E1000_ICR_LSC;}' unless defined(&E1000_IMC_LSC);
    eval 'sub E1000_IMC_RXSEQ () { &E1000_ICR_RXSEQ;}' unless defined(&E1000_IMC_RXSEQ);
    eval 'sub E1000_IMC_RXDMT0 () { &E1000_ICR_RXDMT0;}' unless defined(&E1000_IMC_RXDMT0);
    eval 'sub E1000_IMC_RXO () { &E1000_ICR_RXO;}' unless defined(&E1000_IMC_RXO);
    eval 'sub E1000_IMC_RXT0 () { &E1000_ICR_RXT0;}' unless defined(&E1000_IMC_RXT0);
    eval 'sub E1000_IMC_MDAC () { &E1000_ICR_MDAC;}' unless defined(&E1000_IMC_MDAC);
    eval 'sub E1000_IMC_RXCFG () { &E1000_ICR_RXCFG;}' unless defined(&E1000_IMC_RXCFG);
    eval 'sub E1000_IMC_GPI_EN0 () { &E1000_ICR_GPI_EN0;}' unless defined(&E1000_IMC_GPI_EN0);
    eval 'sub E1000_IMC_GPI_EN1 () { &E1000_ICR_GPI_EN1;}' unless defined(&E1000_IMC_GPI_EN1);
    eval 'sub E1000_IMC_GPI_EN2 () { &E1000_ICR_GPI_EN2;}' unless defined(&E1000_IMC_GPI_EN2);
    eval 'sub E1000_IMC_GPI_EN3 () { &E1000_ICR_GPI_EN3;}' unless defined(&E1000_IMC_GPI_EN3);
    eval 'sub E1000_IMC_TXD_LOW () { &E1000_ICR_TXD_LOW;}' unless defined(&E1000_IMC_TXD_LOW);
    eval 'sub E1000_IMC_SRPD () { &E1000_ICR_SRPD;}' unless defined(&E1000_IMC_SRPD);
    eval 'sub E1000_IMC_ACK () { &E1000_ICR_ACK;}' unless defined(&E1000_IMC_ACK);
    eval 'sub E1000_IMC_MNG () { &E1000_ICR_MNG;}' unless defined(&E1000_IMC_MNG);
    eval 'sub E1000_IMC_DOCK () { &E1000_ICR_DOCK;}' unless defined(&E1000_IMC_DOCK);
    eval 'sub E1000_IMC_RXD_FIFO_PAR0 () { &E1000_ICR_RXD_FIFO_PAR0;}' unless defined(&E1000_IMC_RXD_FIFO_PAR0);
    eval 'sub E1000_IMC_TXD_FIFO_PAR0 () { &E1000_ICR_TXD_FIFO_PAR0;}' unless defined(&E1000_IMC_TXD_FIFO_PAR0);
    eval 'sub E1000_IMC_HOST_ARB_PAR () { &E1000_ICR_HOST_ARB_PAR;}' unless defined(&E1000_IMC_HOST_ARB_PAR);
    eval 'sub E1000_IMC_PB_PAR () { &E1000_ICR_PB_PAR;}' unless defined(&E1000_IMC_PB_PAR);
    eval 'sub E1000_IMC_RXD_FIFO_PAR1 () { &E1000_ICR_RXD_FIFO_PAR1;}' unless defined(&E1000_IMC_RXD_FIFO_PAR1);
    eval 'sub E1000_IMC_TXD_FIFO_PAR1 () { &E1000_ICR_TXD_FIFO_PAR1;}' unless defined(&E1000_IMC_TXD_FIFO_PAR1);
    eval 'sub E1000_IMC_DSW () { &E1000_ICR_DSW;}' unless defined(&E1000_IMC_DSW);
    eval 'sub E1000_IMC_PHYINT () { &E1000_ICR_PHYINT;}' unless defined(&E1000_IMC_PHYINT);
    eval 'sub E1000_IMC_EPRST () { &E1000_ICR_EPRST;}' unless defined(&E1000_IMC_EPRST);
    eval 'sub E1000_RCTL_RST () {0x1;}' unless defined(&E1000_RCTL_RST);
    eval 'sub E1000_RCTL_EN () {0x2;}' unless defined(&E1000_RCTL_EN);
    eval 'sub E1000_RCTL_SBP () {0x4;}' unless defined(&E1000_RCTL_SBP);
    eval 'sub E1000_RCTL_UPE () {0x8;}' unless defined(&E1000_RCTL_UPE);
    eval 'sub E1000_RCTL_MPE () {0x10;}' unless defined(&E1000_RCTL_MPE);
    eval 'sub E1000_RCTL_LPE () {0x20;}' unless defined(&E1000_RCTL_LPE);
    eval 'sub E1000_RCTL_LBM_NO () {0x;}' unless defined(&E1000_RCTL_LBM_NO);
    eval 'sub E1000_RCTL_LBM_MAC () {0x40;}' unless defined(&E1000_RCTL_LBM_MAC);
    eval 'sub E1000_RCTL_LBM_SLP () {0x80;}' unless defined(&E1000_RCTL_LBM_SLP);
    eval 'sub E1000_RCTL_LBM_TCVR () {0xc0;}' unless defined(&E1000_RCTL_LBM_TCVR);
    eval 'sub E1000_RCTL_DTYP_MASK () {0xc00;}' unless defined(&E1000_RCTL_DTYP_MASK);
    eval 'sub E1000_RCTL_DTYP_PS () {0x400;}' unless defined(&E1000_RCTL_DTYP_PS);
    eval 'sub E1000_RCTL_RDMTS_HALF () {0x;}' unless defined(&E1000_RCTL_RDMTS_HALF);
    eval 'sub E1000_RCTL_RDMTS_QUAT () {0x100;}' unless defined(&E1000_RCTL_RDMTS_QUAT);
    eval 'sub E1000_RCTL_RDMTS_EIGTH () {0x200;}' unless defined(&E1000_RCTL_RDMTS_EIGTH);
    eval 'sub E1000_RCTL_MO_SHIFT () {12;}' unless defined(&E1000_RCTL_MO_SHIFT);
    eval 'sub E1000_RCTL_MO_0 () {0x;}' unless defined(&E1000_RCTL_MO_0);
    eval 'sub E1000_RCTL_MO_1 () {0x1000;}' unless defined(&E1000_RCTL_MO_1);
    eval 'sub E1000_RCTL_MO_2 () {0x2000;}' unless defined(&E1000_RCTL_MO_2);
    eval 'sub E1000_RCTL_MO_3 () {0x3000;}' unless defined(&E1000_RCTL_MO_3);
    eval 'sub E1000_RCTL_MDR () {0x4000;}' unless defined(&E1000_RCTL_MDR);
    eval 'sub E1000_RCTL_BAM () {0x8000;}' unless defined(&E1000_RCTL_BAM);
    eval 'sub E1000_RCTL_SZ_2048 () {0x;}' unless defined(&E1000_RCTL_SZ_2048);
    eval 'sub E1000_RCTL_SZ_1024 () {0x10000;}' unless defined(&E1000_RCTL_SZ_1024);
    eval 'sub E1000_RCTL_SZ_512 () {0x20000;}' unless defined(&E1000_RCTL_SZ_512);
    eval 'sub E1000_RCTL_SZ_256 () {0x30000;}' unless defined(&E1000_RCTL_SZ_256);
    eval 'sub E1000_RCTL_SZ_16384 () {0x10000;}' unless defined(&E1000_RCTL_SZ_16384);
    eval 'sub E1000_RCTL_SZ_8192 () {0x20000;}' unless defined(&E1000_RCTL_SZ_8192);
    eval 'sub E1000_RCTL_SZ_4096 () {0x30000;}' unless defined(&E1000_RCTL_SZ_4096);
    eval 'sub E1000_RCTL_VFE () {0x40000;}' unless defined(&E1000_RCTL_VFE);
    eval 'sub E1000_RCTL_CFIEN () {0x80000;}' unless defined(&E1000_RCTL_CFIEN);
    eval 'sub E1000_RCTL_CFI () {0x100000;}' unless defined(&E1000_RCTL_CFI);
    eval 'sub E1000_RCTL_DPF () {0x400000;}' unless defined(&E1000_RCTL_DPF);
    eval 'sub E1000_RCTL_PMCF () {0x800000;}' unless defined(&E1000_RCTL_PMCF);
    eval 'sub E1000_RCTL_BSEX () {0x2000000;}' unless defined(&E1000_RCTL_BSEX);
    eval 'sub E1000_RCTL_SECRC () {0x4000000;}' unless defined(&E1000_RCTL_SECRC);
    eval 'sub E1000_RCTL_FLXBUF_MASK () {0x78000000;}' unless defined(&E1000_RCTL_FLXBUF_MASK);
    eval 'sub E1000_RCTL_FLXBUF_SHIFT () {27;}' unless defined(&E1000_RCTL_FLXBUF_SHIFT);
    eval 'sub E1000_PSRCTL_BSIZE0_MASK () {0x7f;}' unless defined(&E1000_PSRCTL_BSIZE0_MASK);
    eval 'sub E1000_PSRCTL_BSIZE1_MASK () {0x3f00;}' unless defined(&E1000_PSRCTL_BSIZE1_MASK);
    eval 'sub E1000_PSRCTL_BSIZE2_MASK () {0x3f0000;}' unless defined(&E1000_PSRCTL_BSIZE2_MASK);
    eval 'sub E1000_PSRCTL_BSIZE3_MASK () {0x3f000000;}' unless defined(&E1000_PSRCTL_BSIZE3_MASK);
    eval 'sub E1000_PSRCTL_BSIZE0_SHIFT () {7;}' unless defined(&E1000_PSRCTL_BSIZE0_SHIFT);
    eval 'sub E1000_PSRCTL_BSIZE1_SHIFT () {2;}' unless defined(&E1000_PSRCTL_BSIZE1_SHIFT);
    eval 'sub E1000_PSRCTL_BSIZE2_SHIFT () {6;}' unless defined(&E1000_PSRCTL_BSIZE2_SHIFT);
    eval 'sub E1000_PSRCTL_BSIZE3_SHIFT () {14;}' unless defined(&E1000_PSRCTL_BSIZE3_SHIFT);
    eval 'sub E1000_SWFW_EEP_SM () {0x1;}' unless defined(&E1000_SWFW_EEP_SM);
    eval 'sub E1000_SWFW_PHY0_SM () {0x2;}' unless defined(&E1000_SWFW_PHY0_SM);
    eval 'sub E1000_SWFW_PHY1_SM () {0x4;}' unless defined(&E1000_SWFW_PHY1_SM);
    eval 'sub E1000_SWFW_MAC_CSR_SM () {0x8;}' unless defined(&E1000_SWFW_MAC_CSR_SM);
    eval 'sub E1000_RDT_DELAY () {0xffff;}' unless defined(&E1000_RDT_DELAY);
    eval 'sub E1000_RDT_FPDB () {0x80000000;}' unless defined(&E1000_RDT_FPDB);
    eval 'sub E1000_RDLEN_LEN () {0x7ff80;}' unless defined(&E1000_RDLEN_LEN);
    eval 'sub E1000_RDH_RDH () {0xffff;}' unless defined(&E1000_RDH_RDH);
    eval 'sub E1000_RDT_RDT () {0xffff;}' unless defined(&E1000_RDT_RDT);
    eval 'sub E1000_FCRTH_RTH () {0xfff8;}' unless defined(&E1000_FCRTH_RTH);
    eval 'sub E1000_FCRTH_XFCE () {0x80000000;}' unless defined(&E1000_FCRTH_XFCE);
    eval 'sub E1000_FCRTL_RTL () {0xfff8;}' unless defined(&E1000_FCRTL_RTL);
    eval 'sub E1000_FCRTL_XONE () {0x80000000;}' unless defined(&E1000_FCRTL_XONE);
    eval 'sub E1000_FC_NONE () {0;}' unless defined(&E1000_FC_NONE);
    eval 'sub E1000_FC_RX_PAUSE () {1;}' unless defined(&E1000_FC_RX_PAUSE);
    eval 'sub E1000_FC_TX_PAUSE () {2;}' unless defined(&E1000_FC_TX_PAUSE);
    eval 'sub E1000_FC_FULL () {3;}' unless defined(&E1000_FC_FULL);
    eval 'sub E1000_FC_DEFAULT () {0xff;}' unless defined(&E1000_FC_DEFAULT);
    eval 'sub E1000_RFCTL_ISCSI_DIS () {0x1;}' unless defined(&E1000_RFCTL_ISCSI_DIS);
    eval 'sub E1000_RFCTL_ISCSI_DWC_MASK () {0x3e;}' unless defined(&E1000_RFCTL_ISCSI_DWC_MASK);
    eval 'sub E1000_RFCTL_ISCSI_DWC_SHIFT () {1;}' unless defined(&E1000_RFCTL_ISCSI_DWC_SHIFT);
    eval 'sub E1000_RFCTL_NFSW_DIS () {0x40;}' unless defined(&E1000_RFCTL_NFSW_DIS);
    eval 'sub E1000_RFCTL_NFSR_DIS () {0x80;}' unless defined(&E1000_RFCTL_NFSR_DIS);
    eval 'sub E1000_RFCTL_NFS_VER_MASK () {0x300;}' unless defined(&E1000_RFCTL_NFS_VER_MASK);
    eval 'sub E1000_RFCTL_NFS_VER_SHIFT () {8;}' unless defined(&E1000_RFCTL_NFS_VER_SHIFT);
    eval 'sub E1000_RFCTL_IPV6_DIS () {0x400;}' unless defined(&E1000_RFCTL_IPV6_DIS);
    eval 'sub E1000_RFCTL_IPV6_XSUM_DIS () {0x800;}' unless defined(&E1000_RFCTL_IPV6_XSUM_DIS);
    eval 'sub E1000_RFCTL_ACK_DIS () {0x1000;}' unless defined(&E1000_RFCTL_ACK_DIS);
    eval 'sub E1000_RFCTL_ACKD_DIS () {0x2000;}' unless defined(&E1000_RFCTL_ACKD_DIS);
    eval 'sub E1000_RFCTL_IPFRSP_DIS () {0x4000;}' unless defined(&E1000_RFCTL_IPFRSP_DIS);
    eval 'sub E1000_RFCTL_EXTEN () {0x8000;}' unless defined(&E1000_RFCTL_EXTEN);
    eval 'sub E1000_RFCTL_IPV6_EX_DIS () {0x10000;}' unless defined(&E1000_RFCTL_IPV6_EX_DIS);
    eval 'sub E1000_RFCTL_NEW_IPV6_EXT_DIS () {0x20000;}' unless defined(&E1000_RFCTL_NEW_IPV6_EXT_DIS);
    eval 'sub E1000_RXDCTL_PTHRESH () {0x3f;}' unless defined(&E1000_RXDCTL_PTHRESH);
    eval 'sub E1000_RXDCTL_HTHRESH () {0x3f00;}' unless defined(&E1000_RXDCTL_HTHRESH);
    eval 'sub E1000_RXDCTL_WTHRESH () {0x3f0000;}' unless defined(&E1000_RXDCTL_WTHRESH);
    eval 'sub E1000_RXDCTL_GRAN () {0x1000000;}' unless defined(&E1000_RXDCTL_GRAN);
    eval 'sub E1000_TXDCTL_PTHRESH () {0xff;}' unless defined(&E1000_TXDCTL_PTHRESH);
    eval 'sub E1000_TXDCTL_HTHRESH () {0xff00;}' unless defined(&E1000_TXDCTL_HTHRESH);
    eval 'sub E1000_TXDCTL_WTHRESH () {0xff0000;}' unless defined(&E1000_TXDCTL_WTHRESH);
    eval 'sub E1000_TXDCTL_GRAN () {0x1000000;}' unless defined(&E1000_TXDCTL_GRAN);
    eval 'sub E1000_TXDCTL_LWTHRESH () {0xfe000000;}' unless defined(&E1000_TXDCTL_LWTHRESH);
    eval 'sub E1000_TXDCTL_FULL_TX_DESC_WB () {0x1010000;}' unless defined(&E1000_TXDCTL_FULL_TX_DESC_WB);
    eval 'sub E1000_TXDCTL_COUNT_DESC () {0x400000;}' unless defined(&E1000_TXDCTL_COUNT_DESC);
    eval 'sub E1000_TXCW_FD () {0x20;}' unless defined(&E1000_TXCW_FD);
    eval 'sub E1000_TXCW_HD () {0x40;}' unless defined(&E1000_TXCW_HD);
    eval 'sub E1000_TXCW_PAUSE () {0x80;}' unless defined(&E1000_TXCW_PAUSE);
    eval 'sub E1000_TXCW_ASM_DIR () {0x100;}' unless defined(&E1000_TXCW_ASM_DIR);
    eval 'sub E1000_TXCW_PAUSE_MASK () {0x180;}' unless defined(&E1000_TXCW_PAUSE_MASK);
    eval 'sub E1000_TXCW_RF () {0x3000;}' unless defined(&E1000_TXCW_RF);
    eval 'sub E1000_TXCW_NP () {0x8000;}' unless defined(&E1000_TXCW_NP);
    eval 'sub E1000_TXCW_CW () {0xffff;}' unless defined(&E1000_TXCW_CW);
    eval 'sub E1000_TXCW_TXC () {0x40000000;}' unless defined(&E1000_TXCW_TXC);
    eval 'sub E1000_TXCW_ANE () {0x80000000;}' unless defined(&E1000_TXCW_ANE);
    eval 'sub E1000_RXCW_CW () {0xffff;}' unless defined(&E1000_RXCW_CW);
    eval 'sub E1000_RXCW_NC () {0x4000000;}' unless defined(&E1000_RXCW_NC);
    eval 'sub E1000_RXCW_IV () {0x8000000;}' unless defined(&E1000_RXCW_IV);
    eval 'sub E1000_RXCW_CC () {0x10000000;}' unless defined(&E1000_RXCW_CC);
    eval 'sub E1000_RXCW_C () {0x20000000;}' unless defined(&E1000_RXCW_C);
    eval 'sub E1000_RXCW_SYNCH () {0x40000000;}' unless defined(&E1000_RXCW_SYNCH);
    eval 'sub E1000_RXCW_ANC () {0x80000000;}' unless defined(&E1000_RXCW_ANC);
    eval 'sub E1000_TCTL_RST () {0x1;}' unless defined(&E1000_TCTL_RST);
    eval 'sub E1000_TCTL_EN () {0x2;}' unless defined(&E1000_TCTL_EN);
    eval 'sub E1000_TCTL_BCE () {0x4;}' unless defined(&E1000_TCTL_BCE);
    eval 'sub E1000_TCTL_PSP () {0x8;}' unless defined(&E1000_TCTL_PSP);
    eval 'sub E1000_TCTL_CT () {0xff0;}' unless defined(&E1000_TCTL_CT);
    eval 'sub E1000_TCTL_COLD () {0x3ff000;}' unless defined(&E1000_TCTL_COLD);
    eval 'sub E1000_TCTL_SWXOFF () {0x400000;}' unless defined(&E1000_TCTL_SWXOFF);
    eval 'sub E1000_TCTL_PBE () {0x800000;}' unless defined(&E1000_TCTL_PBE);
    eval 'sub E1000_TCTL_RTLC () {0x1000000;}' unless defined(&E1000_TCTL_RTLC);
    eval 'sub E1000_TCTL_NRTU () {0x2000000;}' unless defined(&E1000_TCTL_NRTU);
    eval 'sub E1000_TCTL_MULR () {0x10000000;}' unless defined(&E1000_TCTL_MULR);
    eval 'sub E1000_TCTL_EXT_BST_MASK () {0x3ff;}' unless defined(&E1000_TCTL_EXT_BST_MASK);
    eval 'sub E1000_TCTL_EXT_GCEX_MASK () {0xffc00;}' unless defined(&E1000_TCTL_EXT_GCEX_MASK);
    eval 'sub DEFAULT_80003ES2LAN_TCTL_EXT_GCEX () {0x10000;}' unless defined(&DEFAULT_80003ES2LAN_TCTL_EXT_GCEX);
    eval 'sub E1000_RXCSUM_PCSS_MASK () {0xff;}' unless defined(&E1000_RXCSUM_PCSS_MASK);
    eval 'sub E1000_RXCSUM_IPOFL () {0x100;}' unless defined(&E1000_RXCSUM_IPOFL);
    eval 'sub E1000_RXCSUM_TUOFL () {0x200;}' unless defined(&E1000_RXCSUM_TUOFL);
    eval 'sub E1000_RXCSUM_IPV6OFL () {0x400;}' unless defined(&E1000_RXCSUM_IPV6OFL);
    eval 'sub E1000_RXCSUM_IPPCSE () {0x1000;}' unless defined(&E1000_RXCSUM_IPPCSE);
    eval 'sub E1000_RXCSUM_PCSD () {0x2000;}' unless defined(&E1000_RXCSUM_PCSD);
    eval 'sub E1000_MRQC_ENABLE_MASK () {0x3;}' unless defined(&E1000_MRQC_ENABLE_MASK);
    eval 'sub E1000_MRQC_ENABLE_RSS_2Q () {0x1;}' unless defined(&E1000_MRQC_ENABLE_RSS_2Q);
    eval 'sub E1000_MRQC_ENABLE_RSS_INT () {0x4;}' unless defined(&E1000_MRQC_ENABLE_RSS_INT);
    eval 'sub E1000_MRQC_RSS_FIELD_MASK () {0xffff0000;}' unless defined(&E1000_MRQC_RSS_FIELD_MASK);
    eval 'sub E1000_MRQC_RSS_FIELD_IPV4_TCP () {0x10000;}' unless defined(&E1000_MRQC_RSS_FIELD_IPV4_TCP);
    eval 'sub E1000_MRQC_RSS_FIELD_IPV4 () {0x20000;}' unless defined(&E1000_MRQC_RSS_FIELD_IPV4);
    eval 'sub E1000_MRQC_RSS_FIELD_IPV6_TCP_EX () {0x40000;}' unless defined(&E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
    eval 'sub E1000_MRQC_RSS_FIELD_IPV6_EX () {0x80000;}' unless defined(&E1000_MRQC_RSS_FIELD_IPV6_EX);
    eval 'sub E1000_MRQC_RSS_FIELD_IPV6 () {0x100000;}' unless defined(&E1000_MRQC_RSS_FIELD_IPV6);
    eval 'sub E1000_MRQC_RSS_FIELD_IPV6_TCP () {0x200000;}' unless defined(&E1000_MRQC_RSS_FIELD_IPV6_TCP);
    eval 'sub E1000_WUC_APME () {0x1;}' unless defined(&E1000_WUC_APME);
    eval 'sub E1000_WUC_PME_EN () {0x2;}' unless defined(&E1000_WUC_PME_EN);
    eval 'sub E1000_WUC_PME_STATUS () {0x4;}' unless defined(&E1000_WUC_PME_STATUS);
    eval 'sub E1000_WUC_APMPME () {0x8;}' unless defined(&E1000_WUC_APMPME);
    eval 'sub E1000_WUC_SPM () {0x80000000;}' unless defined(&E1000_WUC_SPM);
    eval 'sub E1000_WUFC_LNKC () {0x1;}' unless defined(&E1000_WUFC_LNKC);
    eval 'sub E1000_WUFC_MAG () {0x2;}' unless defined(&E1000_WUFC_MAG);
    eval 'sub E1000_WUFC_EX () {0x4;}' unless defined(&E1000_WUFC_EX);
    eval 'sub E1000_WUFC_MC () {0x8;}' unless defined(&E1000_WUFC_MC);
    eval 'sub E1000_WUFC_BC () {0x10;}' unless defined(&E1000_WUFC_BC);
    eval 'sub E1000_WUFC_ARP () {0x20;}' unless defined(&E1000_WUFC_ARP);
    eval 'sub E1000_WUFC_IPV4 () {0x40;}' unless defined(&E1000_WUFC_IPV4);
    eval 'sub E1000_WUFC_IPV6 () {0x80;}' unless defined(&E1000_WUFC_IPV6);
    eval 'sub E1000_WUFC_IGNORE_TCO () {0x8000;}' unless defined(&E1000_WUFC_IGNORE_TCO);
    eval 'sub E1000_WUFC_FLX0 () {0x10000;}' unless defined(&E1000_WUFC_FLX0);
    eval 'sub E1000_WUFC_FLX1 () {0x20000;}' unless defined(&E1000_WUFC_FLX1);
    eval 'sub E1000_WUFC_FLX2 () {0x40000;}' unless defined(&E1000_WUFC_FLX2);
    eval 'sub E1000_WUFC_FLX3 () {0x80000;}' unless defined(&E1000_WUFC_FLX3);
    eval 'sub E1000_WUFC_ALL_FILTERS () {0xf00ff;}' unless defined(&E1000_WUFC_ALL_FILTERS);
    eval 'sub E1000_WUFC_FLX_OFFSET () {16;}' unless defined(&E1000_WUFC_FLX_OFFSET);
    eval 'sub E1000_WUFC_FLX_FILTERS () {0xf0000;}' unless defined(&E1000_WUFC_FLX_FILTERS);
    eval 'sub E1000_WUS_LNKC () {0x1;}' unless defined(&E1000_WUS_LNKC);
    eval 'sub E1000_WUS_MAG () {0x2;}' unless defined(&E1000_WUS_MAG);
    eval 'sub E1000_WUS_EX () {0x4;}' unless defined(&E1000_WUS_EX);
    eval 'sub E1000_WUS_MC () {0x8;}' unless defined(&E1000_WUS_MC);
    eval 'sub E1000_WUS_BC () {0x10;}' unless defined(&E1000_WUS_BC);
    eval 'sub E1000_WUS_ARP () {0x20;}' unless defined(&E1000_WUS_ARP);
    eval 'sub E1000_WUS_IPV4 () {0x40;}' unless defined(&E1000_WUS_IPV4);
    eval 'sub E1000_WUS_IPV6 () {0x80;}' unless defined(&E1000_WUS_IPV6);
    eval 'sub E1000_WUS_FLX0 () {0x10000;}' unless defined(&E1000_WUS_FLX0);
    eval 'sub E1000_WUS_FLX1 () {0x20000;}' unless defined(&E1000_WUS_FLX1);
    eval 'sub E1000_WUS_FLX2 () {0x40000;}' unless defined(&E1000_WUS_FLX2);
    eval 'sub E1000_WUS_FLX3 () {0x80000;}' unless defined(&E1000_WUS_FLX3);
    eval 'sub E1000_WUS_FLX_FILTERS () {0xf0000;}' unless defined(&E1000_WUS_FLX_FILTERS);
    eval 'sub E1000_MANC_SMBUS_EN () {0x1;}' unless defined(&E1000_MANC_SMBUS_EN);
    eval 'sub E1000_MANC_ASF_EN () {0x2;}' unless defined(&E1000_MANC_ASF_EN);
    eval 'sub E1000_MANC_R_ON_FORCE () {0x4;}' unless defined(&E1000_MANC_R_ON_FORCE);
    eval 'sub E1000_MANC_RMCP_EN () {0x100;}' unless defined(&E1000_MANC_RMCP_EN);
    eval 'sub E1000_MANC_0298_EN () {0x200;}' unless defined(&E1000_MANC_0298_EN);
    eval 'sub E1000_MANC_IPV4_EN () {0x400;}' unless defined(&E1000_MANC_IPV4_EN);
    eval 'sub E1000_MANC_IPV6_EN () {0x800;}' unless defined(&E1000_MANC_IPV6_EN);
    eval 'sub E1000_MANC_SNAP_EN () {0x1000;}' unless defined(&E1000_MANC_SNAP_EN);
    eval 'sub E1000_MANC_ARP_EN () {0x2000;}' unless defined(&E1000_MANC_ARP_EN);
    eval 'sub E1000_MANC_NEIGHBOR_EN () {0x4000;}' unless defined(&E1000_MANC_NEIGHBOR_EN);
    eval 'sub E1000_MANC_ARP_RES_EN () {0x8000;}' unless defined(&E1000_MANC_ARP_RES_EN);
    eval 'sub E1000_MANC_TCO_RESET () {0x10000;}' unless defined(&E1000_MANC_TCO_RESET);
    eval 'sub E1000_MANC_RCV_TCO_EN () {0x20000;}' unless defined(&E1000_MANC_RCV_TCO_EN);
    eval 'sub E1000_MANC_REPORT_STATUS () {0x40000;}' unless defined(&E1000_MANC_REPORT_STATUS);
    eval 'sub E1000_MANC_RCV_ALL () {0x80000;}' unless defined(&E1000_MANC_RCV_ALL);
    eval 'sub E1000_MANC_BLK_PHY_RST_ON_IDE () {0x40000;}' unless defined(&E1000_MANC_BLK_PHY_RST_ON_IDE);
    eval 'sub E1000_MANC_EN_MAC_ADDR_FILTER () {0x100000;}' unless defined(&E1000_MANC_EN_MAC_ADDR_FILTER);
    eval 'sub E1000_MANC_EN_MNG2HOST () {0x200000;}' unless defined(&E1000_MANC_EN_MNG2HOST);
    eval 'sub E1000_MANC_EN_IP_ADDR_FILTER () {0x400000;}' unless defined(&E1000_MANC_EN_IP_ADDR_FILTER);
    eval 'sub E1000_MANC_EN_XSUM_FILTER () {0x800000;}' unless defined(&E1000_MANC_EN_XSUM_FILTER);
    eval 'sub E1000_MANC_BR_EN () {0x1000000;}' unless defined(&E1000_MANC_BR_EN);
    eval 'sub E1000_MANC_SMB_REQ () {0x1000000;}' unless defined(&E1000_MANC_SMB_REQ);
    eval 'sub E1000_MANC_SMB_GNT () {0x2000000;}' unless defined(&E1000_MANC_SMB_GNT);
    eval 'sub E1000_MANC_SMB_CLK_IN () {0x4000000;}' unless defined(&E1000_MANC_SMB_CLK_IN);
    eval 'sub E1000_MANC_SMB_DATA_IN () {0x8000000;}' unless defined(&E1000_MANC_SMB_DATA_IN);
    eval 'sub E1000_MANC_SMB_DATA_OUT () {0x10000000;}' unless defined(&E1000_MANC_SMB_DATA_OUT);
    eval 'sub E1000_MANC_SMB_CLK_OUT () {0x20000000;}' unless defined(&E1000_MANC_SMB_CLK_OUT);
    eval 'sub E1000_MANC_SMB_DATA_OUT_SHIFT () {28;}' unless defined(&E1000_MANC_SMB_DATA_OUT_SHIFT);
    eval 'sub E1000_MANC_SMB_CLK_OUT_SHIFT () {29;}' unless defined(&E1000_MANC_SMB_CLK_OUT_SHIFT);
    eval 'sub E1000_SWSM_SMBI () {0x1;}' unless defined(&E1000_SWSM_SMBI);
    eval 'sub E1000_SWSM_SWESMBI () {0x2;}' unless defined(&E1000_SWSM_SWESMBI);
    eval 'sub E1000_SWSM_WMNG () {0x4;}' unless defined(&E1000_SWSM_WMNG);
    eval 'sub E1000_SWSM_DRV_LOAD () {0x8;}' unless defined(&E1000_SWSM_DRV_LOAD);
    eval 'sub E1000_FWSM_MODE_MASK () {0xe;}' unless defined(&E1000_FWSM_MODE_MASK);
    eval 'sub E1000_FWSM_MODE_SHIFT () {1;}' unless defined(&E1000_FWSM_MODE_SHIFT);
    eval 'sub E1000_FWSM_FW_VALID () {0x8000;}' unless defined(&E1000_FWSM_FW_VALID);
    eval 'sub E1000_FWSM_RSPCIPHY () {0x40;}' unless defined(&E1000_FWSM_RSPCIPHY);
    eval 'sub E1000_FWSM_DISSW () {0x10000000;}' unless defined(&E1000_FWSM_DISSW);
    eval 'sub E1000_FWSM_SKUSEL_MASK () {0x60000000;}' unless defined(&E1000_FWSM_SKUSEL_MASK);
    eval 'sub E1000_FWSM_SKUEL_SHIFT () {29;}' unless defined(&E1000_FWSM_SKUEL_SHIFT);
    eval 'sub E1000_FWSM_SKUSEL_EMB () {0x;}' unless defined(&E1000_FWSM_SKUSEL_EMB);
    eval 'sub E1000_FWSM_SKUSEL_CONS () {0x1;}' unless defined(&E1000_FWSM_SKUSEL_CONS);
    eval 'sub E1000_FWSM_SKUSEL_PERF_100 () {0x2;}' unless defined(&E1000_FWSM_SKUSEL_PERF_100);
    eval 'sub E1000_FWSM_SKUSEL_PERF_GBE () {0x3;}' unless defined(&E1000_FWSM_SKUSEL_PERF_GBE);
    eval 'sub E1000_FFLT_DBG_INVC () {0x100000;}' unless defined(&E1000_FFLT_DBG_INVC);
    eval("sub em_mng_mode_none () { 0; }") unless defined(&em_mng_mode_none);
    eval("sub em_mng_mode_asf () { 1; }") unless defined(&em_mng_mode_asf);
    eval("sub em_mng_mode_pt () { 2; }") unless defined(&em_mng_mode_pt);
    eval("sub em_mng_mode_ipmi () { 3; }") unless defined(&em_mng_mode_ipmi);
    eval("sub em_mng_mode_host_interface_only () { 4; }") unless defined(&em_mng_mode_host_interface_only);
    eval 'sub E1000_HICR_EN () {0x1;}' unless defined(&E1000_HICR_EN);
    eval 'sub E1000_HICR_C () {0x2;}' unless defined(&E1000_HICR_C);
    eval 'sub E1000_HICR_SV () {0x4;}' unless defined(&E1000_HICR_SV);
    eval 'sub E1000_HICR_FWR () {0x80;}' unless defined(&E1000_HICR_FWR);
    eval 'sub E1000_HI_MAX_DATA_LENGTH () {252;}' unless defined(&E1000_HI_MAX_DATA_LENGTH);
    eval 'sub E1000_HI_MAX_BLOCK_BYTE_LENGTH () {1792;}' unless defined(&E1000_HI_MAX_BLOCK_BYTE_LENGTH);
    eval 'sub E1000_HI_MAX_BLOCK_DWORD_LENGTH () {448;}' unless defined(&E1000_HI_MAX_BLOCK_DWORD_LENGTH);
    eval 'sub E1000_HI_COMMAND_TIMEOUT () {500;}' unless defined(&E1000_HI_COMMAND_TIMEOUT);
    eval 'sub E1000_HSMC0R_CLKIN () {0x1;}' unless defined(&E1000_HSMC0R_CLKIN);
    eval 'sub E1000_HSMC0R_DATAIN () {0x2;}' unless defined(&E1000_HSMC0R_DATAIN);
    eval 'sub E1000_HSMC0R_DATAOUT () {0x4;}' unless defined(&E1000_HSMC0R_DATAOUT);
    eval 'sub E1000_HSMC0R_CLKOUT () {0x8;}' unless defined(&E1000_HSMC0R_CLKOUT);
    eval 'sub E1000_HSMC1R_CLKIN () { &E1000_HSMC0R_CLKIN;}' unless defined(&E1000_HSMC1R_CLKIN);
    eval 'sub E1000_HSMC1R_DATAIN () { &E1000_HSMC0R_DATAIN;}' unless defined(&E1000_HSMC1R_DATAIN);
    eval 'sub E1000_HSMC1R_DATAOUT () { &E1000_HSMC0R_DATAOUT;}' unless defined(&E1000_HSMC1R_DATAOUT);
    eval 'sub E1000_HSMC1R_CLKOUT () { &E1000_HSMC0R_CLKOUT;}' unless defined(&E1000_HSMC1R_CLKOUT);
    eval 'sub E1000_FWSTS_FWS_MASK () {0xff;}' unless defined(&E1000_FWSTS_FWS_MASK);
    eval 'sub E1000_WUPL_LENGTH_MASK () {0xfff;}' unless defined(&E1000_WUPL_LENGTH_MASK);
    eval 'sub E1000_MDALIGN () {4096;}' unless defined(&E1000_MDALIGN);
    eval 'sub E1000_GCR_RXD_NO_SNOOP () {0x1;}' unless defined(&E1000_GCR_RXD_NO_SNOOP);
    eval 'sub E1000_GCR_RXDSCW_NO_SNOOP () {0x2;}' unless defined(&E1000_GCR_RXDSCW_NO_SNOOP);
    eval 'sub E1000_GCR_RXDSCR_NO_SNOOP () {0x4;}' unless defined(&E1000_GCR_RXDSCR_NO_SNOOP);
    eval 'sub E1000_GCR_TXD_NO_SNOOP () {0x8;}' unless defined(&E1000_GCR_TXD_NO_SNOOP);
    eval 'sub E1000_GCR_TXDSCW_NO_SNOOP () {0x10;}' unless defined(&E1000_GCR_TXDSCW_NO_SNOOP);
    eval 'sub E1000_GCR_TXDSCR_NO_SNOOP () {0x20;}' unless defined(&E1000_GCR_TXDSCR_NO_SNOOP);
    eval 'sub PCI_EX_NO_SNOOP_ALL () {( &E1000_GCR_RXD_NO_SNOOP |  &E1000_GCR_RXDSCW_NO_SNOOP |  &E1000_GCR_RXDSCR_NO_SNOOP |  &E1000_GCR_TXD_NO_SNOOP |  &E1000_GCR_TXDSCW_NO_SNOOP |  &E1000_GCR_TXDSCR_NO_SNOOP);}' unless defined(&PCI_EX_NO_SNOOP_ALL);
    eval 'sub PCI_EX_82566_SNOOP_ALL () { &PCI_EX_NO_SNOOP_ALL;}' unless defined(&PCI_EX_82566_SNOOP_ALL);
    eval 'sub E1000_GCR_L1_ACT_WITHOUT_L0S_RX () {0x8000000;}' unless defined(&E1000_GCR_L1_ACT_WITHOUT_L0S_RX);
    eval 'sub E1000_FACTPS_FUNC0_POWER_STATE_MASK () {0x3;}' unless defined(&E1000_FACTPS_FUNC0_POWER_STATE_MASK);
    eval 'sub E1000_FACTPS_LAN0_VALID () {0x4;}' unless defined(&E1000_FACTPS_LAN0_VALID);
    eval 'sub E1000_FACTPS_FUNC0_AUX_EN () {0x8;}' unless defined(&E1000_FACTPS_FUNC0_AUX_EN);
    eval 'sub E1000_FACTPS_FUNC1_POWER_STATE_MASK () {0xc0;}' unless defined(&E1000_FACTPS_FUNC1_POWER_STATE_MASK);
    eval 'sub E1000_FACTPS_FUNC1_POWER_STATE_SHIFT () {6;}' unless defined(&E1000_FACTPS_FUNC1_POWER_STATE_SHIFT);
    eval 'sub E1000_FACTPS_LAN1_VALID () {0x100;}' unless defined(&E1000_FACTPS_LAN1_VALID);
    eval 'sub E1000_FACTPS_FUNC1_AUX_EN () {0x200;}' unless defined(&E1000_FACTPS_FUNC1_AUX_EN);
    eval 'sub E1000_FACTPS_FUNC2_POWER_STATE_MASK () {0x3000;}' unless defined(&E1000_FACTPS_FUNC2_POWER_STATE_MASK);
    eval 'sub E1000_FACTPS_FUNC2_POWER_STATE_SHIFT () {12;}' unless defined(&E1000_FACTPS_FUNC2_POWER_STATE_SHIFT);
    eval 'sub E1000_FACTPS_IDE_ENABLE () {0x4000;}' unless defined(&E1000_FACTPS_IDE_ENABLE);
    eval 'sub E1000_FACTPS_FUNC2_AUX_EN () {0x8000;}' unless defined(&E1000_FACTPS_FUNC2_AUX_EN);
    eval 'sub E1000_FACTPS_FUNC3_POWER_STATE_MASK () {0xc0000;}' unless defined(&E1000_FACTPS_FUNC3_POWER_STATE_MASK);
    eval 'sub E1000_FACTPS_FUNC3_POWER_STATE_SHIFT () {18;}' unless defined(&E1000_FACTPS_FUNC3_POWER_STATE_SHIFT);
    eval 'sub E1000_FACTPS_SP_ENABLE () {0x100000;}' unless defined(&E1000_FACTPS_SP_ENABLE);
    eval 'sub E1000_FACTPS_FUNC3_AUX_EN () {0x200000;}' unless defined(&E1000_FACTPS_FUNC3_AUX_EN);
    eval 'sub E1000_FACTPS_FUNC4_POWER_STATE_MASK () {0x3000000;}' unless defined(&E1000_FACTPS_FUNC4_POWER_STATE_MASK);
    eval 'sub E1000_FACTPS_FUNC4_POWER_STATE_SHIFT () {24;}' unless defined(&E1000_FACTPS_FUNC4_POWER_STATE_SHIFT);
    eval 'sub E1000_FACTPS_IPMI_ENABLE () {0x4000000;}' unless defined(&E1000_FACTPS_IPMI_ENABLE);
    eval 'sub E1000_FACTPS_FUNC4_AUX_EN () {0x8000000;}' unless defined(&E1000_FACTPS_FUNC4_AUX_EN);
    eval 'sub E1000_FACTPS_MNGCG () {0x20000000;}' unless defined(&E1000_FACTPS_MNGCG);
    eval 'sub E1000_FACTPS_LAN_FUNC_SEL () {0x40000000;}' unless defined(&E1000_FACTPS_LAN_FUNC_SEL);
    eval 'sub E1000_FACTPS_PM_STATE_CHANGED () {0x80000000;}' unless defined(&E1000_FACTPS_PM_STATE_CHANGED);
    eval 'sub PCI_EX_LINK_STATUS () {0x12;}' unless defined(&PCI_EX_LINK_STATUS);
    eval 'sub PCI_EX_LINK_WIDTH_MASK () {0x3f0;}' unless defined(&PCI_EX_LINK_WIDTH_MASK);
    eval 'sub PCI_EX_LINK_WIDTH_SHIFT () {4;}' unless defined(&PCI_EX_LINK_WIDTH_SHIFT);
    eval 'sub EEPROM_READ_OPCODE_MICROWIRE () {0x6;}' unless defined(&EEPROM_READ_OPCODE_MICROWIRE);
    eval 'sub EEPROM_WRITE_OPCODE_MICROWIRE () {0x5;}' unless defined(&EEPROM_WRITE_OPCODE_MICROWIRE);
    eval 'sub EEPROM_ERASE_OPCODE_MICROWIRE () {0x7;}' unless defined(&EEPROM_ERASE_OPCODE_MICROWIRE);
    eval 'sub EEPROM_EWEN_OPCODE_MICROWIRE () {0x13;}' unless defined(&EEPROM_EWEN_OPCODE_MICROWIRE);
    eval 'sub EEPROM_EWDS_OPCODE_MICROWIRE () {0x10;}' unless defined(&EEPROM_EWDS_OPCODE_MICROWIRE);
    eval 'sub EEPROM_MAX_RETRY_SPI () {5000;}' unless defined(&EEPROM_MAX_RETRY_SPI);
    eval 'sub EEPROM_READ_OPCODE_SPI () {0x3;}' unless defined(&EEPROM_READ_OPCODE_SPI);
    eval 'sub EEPROM_WRITE_OPCODE_SPI () {0x2;}' unless defined(&EEPROM_WRITE_OPCODE_SPI);
    eval 'sub EEPROM_A8_OPCODE_SPI () {0x8;}' unless defined(&EEPROM_A8_OPCODE_SPI);
    eval 'sub EEPROM_WREN_OPCODE_SPI () {0x6;}' unless defined(&EEPROM_WREN_OPCODE_SPI);
    eval 'sub EEPROM_WRDI_OPCODE_SPI () {0x4;}' unless defined(&EEPROM_WRDI_OPCODE_SPI);
    eval 'sub EEPROM_RDSR_OPCODE_SPI () {0x5;}' unless defined(&EEPROM_RDSR_OPCODE_SPI);
    eval 'sub EEPROM_WRSR_OPCODE_SPI () {0x1;}' unless defined(&EEPROM_WRSR_OPCODE_SPI);
    eval 'sub EEPROM_ERASE4K_OPCODE_SPI () {0x20;}' unless defined(&EEPROM_ERASE4K_OPCODE_SPI);
    eval 'sub EEPROM_ERASE64K_OPCODE_SPI () {0xd8;}' unless defined(&EEPROM_ERASE64K_OPCODE_SPI);
    eval 'sub EEPROM_ERASE256_OPCODE_SPI () {0xdb;}' unless defined(&EEPROM_ERASE256_OPCODE_SPI);
    eval 'sub EEPROM_WORD_SIZE_SHIFT () {6;}' unless defined(&EEPROM_WORD_SIZE_SHIFT);
    eval 'sub EEPROM_SIZE_SHIFT () {10;}' unless defined(&EEPROM_SIZE_SHIFT);
    eval 'sub EEPROM_SIZE_MASK () {0x1c00;}' unless defined(&EEPROM_SIZE_MASK);
    eval 'sub EEPROM_COMPAT () {0x3;}' unless defined(&EEPROM_COMPAT);
    eval 'sub EEPROM_ID_LED_SETTINGS () {0x4;}' unless defined(&EEPROM_ID_LED_SETTINGS);
    eval 'sub EEPROM_VERSION () {0x5;}' unless defined(&EEPROM_VERSION);
    eval 'sub EEPROM_SERDES_AMPLITUDE () {0x6;}' unless defined(&EEPROM_SERDES_AMPLITUDE);
    eval 'sub EEPROM_PHY_CLASS_WORD () {0x7;}' unless defined(&EEPROM_PHY_CLASS_WORD);
    eval 'sub EEPROM_INIT_CONTROL1_REG () {0xa;}' unless defined(&EEPROM_INIT_CONTROL1_REG);
    eval 'sub EEPROM_INIT_CONTROL2_REG () {0xf;}' unless defined(&EEPROM_INIT_CONTROL2_REG);
    eval 'sub EEPROM_SWDEF_PINS_CTRL_PORT_1 () {0x10;}' unless defined(&EEPROM_SWDEF_PINS_CTRL_PORT_1);
    eval 'sub EEPROM_INIT_CONTROL3_PORT_B () {0x14;}' unless defined(&EEPROM_INIT_CONTROL3_PORT_B);
    eval 'sub EEPROM_INIT_3GIO_3 () {0x1a;}' unless defined(&EEPROM_INIT_3GIO_3);
    eval 'sub EEPROM_SWDEF_PINS_CTRL_PORT_0 () {0x20;}' unless defined(&EEPROM_SWDEF_PINS_CTRL_PORT_0);
    eval 'sub EEPROM_INIT_CONTROL3_PORT_A () {0x24;}' unless defined(&EEPROM_INIT_CONTROL3_PORT_A);
    eval 'sub EEPROM_CFG () {0x12;}' unless defined(&EEPROM_CFG);
    eval 'sub EEPROM_FLASH_VERSION () {0x32;}' unless defined(&EEPROM_FLASH_VERSION);
    eval 'sub EEPROM_CHECKSUM_REG () {0x3f;}' unless defined(&EEPROM_CHECKSUM_REG);
    eval 'sub E1000_EEPROM_CFG_DONE () {0x40000;}' unless defined(&E1000_EEPROM_CFG_DONE);
    eval 'sub E1000_EEPROM_CFG_DONE_PORT_1 () {0x80000;}' unless defined(&E1000_EEPROM_CFG_DONE_PORT_1);
    eval 'sub ID_LED_RESERVED_0000 () {0x;}' unless defined(&ID_LED_RESERVED_0000);
    eval 'sub ID_LED_RESERVED_FFFF () {0xffff;}' unless defined(&ID_LED_RESERVED_FFFF);
    eval 'sub ID_LED_RESERVED_82573 () {0xf746;}' unless defined(&ID_LED_RESERVED_82573);
    eval 'sub ID_LED_DEFAULT_82573 () {0x1811;}' unless defined(&ID_LED_DEFAULT_82573);
    eval 'sub ID_LED_DEFAULT () {(( &ID_LED_OFF1_ON2 << 12) | ( &ID_LED_OFF1_OFF2 << 8) | ( &ID_LED_DEF1_DEF2 << 4) | ( &ID_LED_DEF1_DEF2));}' unless defined(&ID_LED_DEFAULT);
    eval 'sub ID_LED_DEFAULT_ICH8LAN () {(( &ID_LED_DEF1_DEF2 << 12) | ( &ID_LED_DEF1_OFF2 << 8) | ( &ID_LED_DEF1_ON2 << 4) | ( &ID_LED_DEF1_DEF2));}' unless defined(&ID_LED_DEFAULT_ICH8LAN);
    eval 'sub ID_LED_DEF1_DEF2 () {0x1;}' unless defined(&ID_LED_DEF1_DEF2);
    eval 'sub ID_LED_DEF1_ON2 () {0x2;}' unless defined(&ID_LED_DEF1_ON2);
    eval 'sub ID_LED_DEF1_OFF2 () {0x3;}' unless defined(&ID_LED_DEF1_OFF2);
    eval 'sub ID_LED_ON1_DEF2 () {0x4;}' unless defined(&ID_LED_ON1_DEF2);
    eval 'sub ID_LED_ON1_ON2 () {0x5;}' unless defined(&ID_LED_ON1_ON2);
    eval 'sub ID_LED_ON1_OFF2 () {0x6;}' unless defined(&ID_LED_ON1_OFF2);
    eval 'sub ID_LED_OFF1_DEF2 () {0x7;}' unless defined(&ID_LED_OFF1_DEF2);
    eval 'sub ID_LED_OFF1_ON2 () {0x8;}' unless defined(&ID_LED_OFF1_ON2);
    eval 'sub ID_LED_OFF1_OFF2 () {0x9;}' unless defined(&ID_LED_OFF1_OFF2);
    eval 'sub IGP_ACTIVITY_LED_MASK () {0xfffff0ff;}' unless defined(&IGP_ACTIVITY_LED_MASK);
    eval 'sub IGP_ACTIVITY_LED_ENABLE () {0x300;}' unless defined(&IGP_ACTIVITY_LED_ENABLE);
    eval 'sub IGP_LED3_MODE () {0x7000000;}' unless defined(&IGP_LED3_MODE);
    eval 'sub EEPROM_SERDES_AMPLITUDE_MASK () {0xf;}' unless defined(&EEPROM_SERDES_AMPLITUDE_MASK);
    eval 'sub EEPROM_PHY_CLASS_A () {0x8000;}' unless defined(&EEPROM_PHY_CLASS_A);
    eval 'sub EEPROM_WORD0A_ILOS () {0x10;}' unless defined(&EEPROM_WORD0A_ILOS);
    eval 'sub EEPROM_WORD0A_SWDPIO () {0x1e0;}' unless defined(&EEPROM_WORD0A_SWDPIO);
    eval 'sub EEPROM_WORD0A_LRST () {0x200;}' unless defined(&EEPROM_WORD0A_LRST);
    eval 'sub EEPROM_WORD0A_FD () {0x400;}' unless defined(&EEPROM_WORD0A_FD);
    eval 'sub EEPROM_WORD0A_66MHZ () {0x800;}' unless defined(&EEPROM_WORD0A_66MHZ);
    eval 'sub EEPROM_WORD0F_PAUSE_MASK () {0x3000;}' unless defined(&EEPROM_WORD0F_PAUSE_MASK);
    eval 'sub EEPROM_WORD0F_PAUSE () {0x1000;}' unless defined(&EEPROM_WORD0F_PAUSE);
    eval 'sub EEPROM_WORD0F_ASM_DIR () {0x2000;}' unless defined(&EEPROM_WORD0F_ASM_DIR);
    eval 'sub EEPROM_WORD0F_ANE () {0x800;}' unless defined(&EEPROM_WORD0F_ANE);
    eval 'sub EEPROM_WORD0F_SWPDIO_EXT () {0xf0;}' unless defined(&EEPROM_WORD0F_SWPDIO_EXT);
    eval 'sub EEPROM_WORD0F_LPLU () {0x1;}' unless defined(&EEPROM_WORD0F_LPLU);
    eval 'sub EEPROM_WORD1020_GIGA_DISABLE () {0x10;}' unless defined(&EEPROM_WORD1020_GIGA_DISABLE);
    eval 'sub EEPROM_WORD1020_GIGA_DISABLE_NON_D0A () {0x8;}' unless defined(&EEPROM_WORD1020_GIGA_DISABLE_NON_D0A);
    eval 'sub EEPROM_WORD1A_ASPM_MASK () {0xc;}' unless defined(&EEPROM_WORD1A_ASPM_MASK);
    eval 'sub EEPROM_SUM () {0xbaba;}' unless defined(&EEPROM_SUM);
    eval 'sub EEPROM_NODE_ADDRESS_BYTE_0 () {0;}' unless defined(&EEPROM_NODE_ADDRESS_BYTE_0);
    eval 'sub EEPROM_PBA_BYTE_1 () {8;}' unless defined(&EEPROM_PBA_BYTE_1);
    eval 'sub EEPROM_RESERVED_WORD () {0xffff;}' unless defined(&EEPROM_RESERVED_WORD);
    eval 'sub PBA_SIZE () {4;}' unless defined(&PBA_SIZE);
    eval 'sub E1000_COLLISION_THRESHOLD () {15;}' unless defined(&E1000_COLLISION_THRESHOLD);
    eval 'sub E1000_CT_SHIFT () {4;}' unless defined(&E1000_CT_SHIFT);
    eval 'sub E1000_COLLISION_DISTANCE () {63;}' unless defined(&E1000_COLLISION_DISTANCE);
    eval 'sub E1000_COLLISION_DISTANCE_82542 () {64;}' unless defined(&E1000_COLLISION_DISTANCE_82542);
    eval 'sub E1000_FDX_COLLISION_DISTANCE () { &E1000_COLLISION_DISTANCE;}' unless defined(&E1000_FDX_COLLISION_DISTANCE);
    eval 'sub E1000_HDX_COLLISION_DISTANCE () { &E1000_COLLISION_DISTANCE;}' unless defined(&E1000_HDX_COLLISION_DISTANCE);
    eval 'sub E1000_COLD_SHIFT () {12;}' unless defined(&E1000_COLD_SHIFT);
    eval 'sub REQ_TX_DESCRIPTOR_MULTIPLE () {8;}' unless defined(&REQ_TX_DESCRIPTOR_MULTIPLE);
    eval 'sub REQ_RX_DESCRIPTOR_MULTIPLE () {8;}' unless defined(&REQ_RX_DESCRIPTOR_MULTIPLE);
    eval 'sub DEFAULT_82542_TIPG_IPGT () {10;}' unless defined(&DEFAULT_82542_TIPG_IPGT);
    eval 'sub DEFAULT_82543_TIPG_IPGT_FIBER () {9;}' unless defined(&DEFAULT_82543_TIPG_IPGT_FIBER);
    eval 'sub DEFAULT_82543_TIPG_IPGT_COPPER () {8;}' unless defined(&DEFAULT_82543_TIPG_IPGT_COPPER);
    eval 'sub E1000_TIPG_IPGT_MASK () {0x3ff;}' unless defined(&E1000_TIPG_IPGT_MASK);
    eval 'sub E1000_TIPG_IPGR1_MASK () {0xffc00;}' unless defined(&E1000_TIPG_IPGR1_MASK);
    eval 'sub E1000_TIPG_IPGR2_MASK () {0x3ff00000;}' unless defined(&E1000_TIPG_IPGR2_MASK);
    eval 'sub DEFAULT_82542_TIPG_IPGR1 () {2;}' unless defined(&DEFAULT_82542_TIPG_IPGR1);
    eval 'sub DEFAULT_82543_TIPG_IPGR1 () {8;}' unless defined(&DEFAULT_82543_TIPG_IPGR1);
    eval 'sub E1000_TIPG_IPGR1_SHIFT () {10;}' unless defined(&E1000_TIPG_IPGR1_SHIFT);
    eval 'sub DEFAULT_82542_TIPG_IPGR2 () {10;}' unless defined(&DEFAULT_82542_TIPG_IPGR2);
    eval 'sub DEFAULT_82543_TIPG_IPGR2 () {6;}' unless defined(&DEFAULT_82543_TIPG_IPGR2);
    eval 'sub DEFAULT_80003ES2LAN_TIPG_IPGR2 () {7;}' unless defined(&DEFAULT_80003ES2LAN_TIPG_IPGR2);
    eval 'sub E1000_TIPG_IPGR2_SHIFT () {20;}' unless defined(&E1000_TIPG_IPGR2_SHIFT);
    eval 'sub DEFAULT_80003ES2LAN_TIPG_IPGT_10_100 () {0x9;}' unless defined(&DEFAULT_80003ES2LAN_TIPG_IPGT_10_100);
    eval 'sub DEFAULT_80003ES2LAN_TIPG_IPGT_1000 () {0x8;}' unless defined(&DEFAULT_80003ES2LAN_TIPG_IPGT_1000);
    eval 'sub E1000_TXDMAC_DPP () {0x1;}' unless defined(&E1000_TXDMAC_DPP);
    eval 'sub TX_THRESHOLD_START () {8;}' unless defined(&TX_THRESHOLD_START);
    eval 'sub TX_THRESHOLD_INCREMENT () {10;}' unless defined(&TX_THRESHOLD_INCREMENT);
    eval 'sub TX_THRESHOLD_DECREMENT () {1;}' unless defined(&TX_THRESHOLD_DECREMENT);
    eval 'sub TX_THRESHOLD_STOP () {190;}' unless defined(&TX_THRESHOLD_STOP);
    eval 'sub TX_THRESHOLD_DISABLE () {0;}' unless defined(&TX_THRESHOLD_DISABLE);
    eval 'sub TX_THRESHOLD_TIMER_MS () {10000;}' unless defined(&TX_THRESHOLD_TIMER_MS);
    eval 'sub MIN_NUM_XMITS () {1000;}' unless defined(&MIN_NUM_XMITS);
    eval 'sub IFS_MAX () {80;}' unless defined(&IFS_MAX);
    eval 'sub IFS_STEP () {10;}' unless defined(&IFS_STEP);
    eval 'sub IFS_MIN () {40;}' unless defined(&IFS_MIN);
    eval 'sub IFS_RATIO () {4;}' unless defined(&IFS_RATIO);
    eval 'sub E1000_EXTCNF_CTRL_PCIE_WRITE_ENABLE () {0x1;}' unless defined(&E1000_EXTCNF_CTRL_PCIE_WRITE_ENABLE);
    eval 'sub E1000_EXTCNF_CTRL_PHY_WRITE_ENABLE () {0x2;}' unless defined(&E1000_EXTCNF_CTRL_PHY_WRITE_ENABLE);
    eval 'sub E1000_EXTCNF_CTRL_D_UD_ENABLE () {0x4;}' unless defined(&E1000_EXTCNF_CTRL_D_UD_ENABLE);
    eval 'sub E1000_EXTCNF_CTRL_D_UD_LATENCY () {0x8;}' unless defined(&E1000_EXTCNF_CTRL_D_UD_LATENCY);
    eval 'sub E1000_EXTCNF_CTRL_D_UD_OWNER () {0x10;}' unless defined(&E1000_EXTCNF_CTRL_D_UD_OWNER);
    eval 'sub E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP () {0x20;}' unless defined(&E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP);
    eval 'sub E1000_EXTCNF_CTRL_MDIO_HW_OWNERSHIP () {0x40;}' unless defined(&E1000_EXTCNF_CTRL_MDIO_HW_OWNERSHIP);
    eval 'sub E1000_EXTCNF_CTRL_EXT_CNF_POINTER () {0xfff0000;}' unless defined(&E1000_EXTCNF_CTRL_EXT_CNF_POINTER);
    eval 'sub E1000_EXTCNF_SIZE_EXT_PHY_LENGTH () {0xff;}' unless defined(&E1000_EXTCNF_SIZE_EXT_PHY_LENGTH);
    eval 'sub E1000_EXTCNF_SIZE_EXT_DOCK_LENGTH () {0xff00;}' unless defined(&E1000_EXTCNF_SIZE_EXT_DOCK_LENGTH);
    eval 'sub E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH () {0xff0000;}' unless defined(&E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH);
    eval 'sub E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE () {0x1;}' unless defined(&E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE);
    eval 'sub E1000_EXTCNF_CTRL_SWFLAG () {0x20;}' unless defined(&E1000_EXTCNF_CTRL_SWFLAG);
    eval 'sub E1000_PBA_8K () {0x8;}' unless defined(&E1000_PBA_8K);
    eval 'sub E1000_PBA_12K () {0xc;}' unless defined(&E1000_PBA_12K);
    eval 'sub E1000_PBA_16K () {0x10;}' unless defined(&E1000_PBA_16K);
    eval 'sub E1000_PBA_22K () {0x16;}' unless defined(&E1000_PBA_22K);
    eval 'sub E1000_PBA_24K () {0x18;}' unless defined(&E1000_PBA_24K);
    eval 'sub E1000_PBA_30K () {0x1e;}' unless defined(&E1000_PBA_30K);
    eval 'sub E1000_PBA_32K () {0x20;}' unless defined(&E1000_PBA_32K);
    eval 'sub E1000_PBA_34K () {0x22;}' unless defined(&E1000_PBA_34K);
    eval 'sub E1000_PBA_38K () {0x26;}' unless defined(&E1000_PBA_38K);
    eval 'sub E1000_PBA_40K () {0x28;}' unless defined(&E1000_PBA_40K);
    eval 'sub E1000_PBA_48K () {0x30;}' unless defined(&E1000_PBA_48K);
    eval 'sub E1000_PBS_16K () { &E1000_PBA_16K;}' unless defined(&E1000_PBS_16K);
    eval 'sub FLOW_CONTROL_ADDRESS_LOW () {0xc28001;}' unless defined(&FLOW_CONTROL_ADDRESS_LOW);
    eval 'sub FLOW_CONTROL_ADDRESS_HIGH () {0x100;}' unless defined(&FLOW_CONTROL_ADDRESS_HIGH);
    eval 'sub FLOW_CONTROL_TYPE () {0x8808;}' unless defined(&FLOW_CONTROL_TYPE);
    eval 'sub FC_DEFAULT_HI_THRESH () {(0x8000);}' unless defined(&FC_DEFAULT_HI_THRESH);
    eval 'sub FC_DEFAULT_LO_THRESH () {(0x4000);}' unless defined(&FC_DEFAULT_LO_THRESH);
    eval 'sub FC_DEFAULT_TX_TIMER () {(0x100);}' unless defined(&FC_DEFAULT_TX_TIMER);
    eval 'sub PCIX_COMMAND_REGISTER () {0xe6;}' unless defined(&PCIX_COMMAND_REGISTER);
    eval 'sub PCIX_STATUS_REGISTER_LO () {0xe8;}' unless defined(&PCIX_STATUS_REGISTER_LO);
    eval 'sub PCIX_STATUS_REGISTER_HI () {0xea;}' unless defined(&PCIX_STATUS_REGISTER_HI);
    eval 'sub PCIX_COMMAND_MMRBC_MASK () {0xc;}' unless defined(&PCIX_COMMAND_MMRBC_MASK);
    eval 'sub PCIX_COMMAND_MMRBC_SHIFT () {0x2;}' unless defined(&PCIX_COMMAND_MMRBC_SHIFT);
    eval 'sub PCIX_STATUS_HI_MMRBC_MASK () {0x60;}' unless defined(&PCIX_STATUS_HI_MMRBC_MASK);
    eval 'sub PCIX_STATUS_HI_MMRBC_SHIFT () {0x5;}' unless defined(&PCIX_STATUS_HI_MMRBC_SHIFT);
    eval 'sub PCIX_STATUS_HI_MMRBC_4K () {0x3;}' unless defined(&PCIX_STATUS_HI_MMRBC_4K);
    eval 'sub PCIX_STATUS_HI_MMRBC_2K () {0x2;}' unless defined(&PCIX_STATUS_HI_MMRBC_2K);
    eval 'sub PAUSE_SHIFT () {5;}' unless defined(&PAUSE_SHIFT);
    eval 'sub SWDPIO_SHIFT () {17;}' unless defined(&SWDPIO_SHIFT);
    eval 'sub SWDPIO__EXT_SHIFT () {4;}' unless defined(&SWDPIO__EXT_SHIFT);
    eval 'sub ILOS_SHIFT () {3;}' unless defined(&ILOS_SHIFT);
    eval 'sub RECEIVE_BUFFER_ALIGN_SIZE () {(256);}' unless defined(&RECEIVE_BUFFER_ALIGN_SIZE);
    eval 'sub LINK_UP_TIMEOUT () {500;}' unless defined(&LINK_UP_TIMEOUT);
    eval 'sub MASTER_DISABLE_TIMEOUT () {800;}' unless defined(&MASTER_DISABLE_TIMEOUT);
    eval 'sub AUTO_READ_DONE_TIMEOUT () {10;}' unless defined(&AUTO_READ_DONE_TIMEOUT);
    eval 'sub PHY_CFG_TIMEOUT () {100;}' unless defined(&PHY_CFG_TIMEOUT);
    eval 'sub E1000_TX_BUFFER_SIZE () {(( &uint32_t)1514);}' unless defined(&E1000_TX_BUFFER_SIZE);
    eval 'sub CARRIER_EXTENSION () {0xf;}' unless defined(&CARRIER_EXTENSION);
    eval 'sub TBI_ACCEPT {
        my($sc, $status, $errors, $length, $last_byte) = @_;
	    eval q((($sc)-> &tbi_compatibility_on  && ((($errors) &  &E1000_RXD_ERR_FRAME_ERR_MASK) ==  &E1000_RXD_ERR_CE)  && (($last_byte) ==  &CARRIER_EXTENSION)  && ((($status) &  &E1000_RXD_STAT_VP) ? ((($length) > (($sc)-> &min_frame_size -  &VLAN_TAG_SIZE))  && (($length) <= (($sc)-> &max_frame_size + 1))) : ((($length) > ($sc)-> &min_frame_size)  && (($length) <= (($sc)-> &max_frame_size +  &VLAN_TAG_SIZE + 1))))));
    }' unless defined(&TBI_ACCEPT);
    eval 'sub E1000_CTRL_PHY_RESET_DIR () { &E1000_CTRL_SWDPIO0;}' unless defined(&E1000_CTRL_PHY_RESET_DIR);
    eval 'sub E1000_CTRL_PHY_RESET () { &E1000_CTRL_SWDPIN0;}' unless defined(&E1000_CTRL_PHY_RESET);
    eval 'sub E1000_CTRL_MDIO_DIR () { &E1000_CTRL_SWDPIO2;}' unless defined(&E1000_CTRL_MDIO_DIR);
    eval 'sub E1000_CTRL_MDIO () { &E1000_CTRL_SWDPIN2;}' unless defined(&E1000_CTRL_MDIO);
    eval 'sub E1000_CTRL_MDC_DIR () { &E1000_CTRL_SWDPIO3;}' unless defined(&E1000_CTRL_MDC_DIR);
    eval 'sub E1000_CTRL_MDC () { &E1000_CTRL_SWDPIN3;}' unless defined(&E1000_CTRL_MDC);
    eval 'sub E1000_CTRL_PHY_RESET_DIR4 () { &E1000_CTRL_EXT_SDP4_DIR;}' unless defined(&E1000_CTRL_PHY_RESET_DIR4);
    eval 'sub E1000_CTRL_PHY_RESET4 () { &E1000_CTRL_EXT_SDP4_DATA;}' unless defined(&E1000_CTRL_PHY_RESET4);
    eval 'sub PHY_CTRL () {0x;}' unless defined(&PHY_CTRL);
    eval 'sub PHY_STATUS () {0x1;}' unless defined(&PHY_STATUS);
    eval 'sub PHY_ID1 () {0x2;}' unless defined(&PHY_ID1);
    eval 'sub PHY_ID2 () {0x3;}' unless defined(&PHY_ID2);
    eval 'sub PHY_AUTONEG_ADV () {0x4;}' unless defined(&PHY_AUTONEG_ADV);
    eval 'sub PHY_LP_ABILITY () {0x5;}' unless defined(&PHY_LP_ABILITY);
    eval 'sub PHY_AUTONEG_EXP () {0x6;}' unless defined(&PHY_AUTONEG_EXP);
    eval 'sub PHY_NEXT_PAGE_TX () {0x7;}' unless defined(&PHY_NEXT_PAGE_TX);
    eval 'sub PHY_LP_NEXT_PAGE () {0x8;}' unless defined(&PHY_LP_NEXT_PAGE);
    eval 'sub PHY_1000T_CTRL () {0x9;}' unless defined(&PHY_1000T_CTRL);
    eval 'sub PHY_1000T_STATUS () {0xa;}' unless defined(&PHY_1000T_STATUS);
    eval 'sub PHY_EXT_STATUS () {0xf;}' unless defined(&PHY_EXT_STATUS);
    eval 'sub MAX_PHY_REG_ADDRESS () {0x1f;}' unless defined(&MAX_PHY_REG_ADDRESS);
    eval 'sub MAX_PHY_MULTI_PAGE_REG () {0xf;}' unless defined(&MAX_PHY_MULTI_PAGE_REG);
    eval 'sub M88E1000_PHY_SPEC_CTRL () {0x10;}' unless defined(&M88E1000_PHY_SPEC_CTRL);
    eval 'sub M88E1000_PHY_SPEC_STATUS () {0x11;}' unless defined(&M88E1000_PHY_SPEC_STATUS);
    eval 'sub M88E1000_INT_ENABLE () {0x12;}' unless defined(&M88E1000_INT_ENABLE);
    eval 'sub M88E1000_INT_STATUS () {0x13;}' unless defined(&M88E1000_INT_STATUS);
    eval 'sub M88E1000_EXT_PHY_SPEC_CTRL () {0x14;}' unless defined(&M88E1000_EXT_PHY_SPEC_CTRL);
    eval 'sub M88E1000_RX_ERR_CNTR () {0x15;}' unless defined(&M88E1000_RX_ERR_CNTR);
    eval 'sub M88E1000_PHY_EXT_CTRL () {0x1a;}' unless defined(&M88E1000_PHY_EXT_CTRL);
    eval 'sub M88E1000_PHY_PAGE_SELECT () {0x1d;}' unless defined(&M88E1000_PHY_PAGE_SELECT);
    eval 'sub M88E1000_PHY_GEN_CONTROL () {0x1e;}' unless defined(&M88E1000_PHY_GEN_CONTROL);
    eval 'sub M88E1000_PHY_VCO_REG_BIT8 () {0x100;}' unless defined(&M88E1000_PHY_VCO_REG_BIT8);
    eval 'sub M88E1000_PHY_VCO_REG_BIT11 () {0x800;}' unless defined(&M88E1000_PHY_VCO_REG_BIT11);
    eval 'sub IGP01E1000_IEEE_REGS_PAGE () {0x;}' unless defined(&IGP01E1000_IEEE_REGS_PAGE);
    eval 'sub IGP01E1000_IEEE_RESTART_AUTONEG () {0x3300;}' unless defined(&IGP01E1000_IEEE_RESTART_AUTONEG);
    eval 'sub IGP01E1000_IEEE_FORCE_GIGA () {0x140;}' unless defined(&IGP01E1000_IEEE_FORCE_GIGA);
    eval 'sub IGP01E1000_PHY_PORT_CONFIG () {0x10;}' unless defined(&IGP01E1000_PHY_PORT_CONFIG);
    eval 'sub IGP01E1000_PHY_PORT_STATUS () {0x11;}' unless defined(&IGP01E1000_PHY_PORT_STATUS);
    eval 'sub IGP01E1000_PHY_PORT_CTRL () {0x12;}' unless defined(&IGP01E1000_PHY_PORT_CTRL);
    eval 'sub IGP01E1000_PHY_LINK_HEALTH () {0x13;}' unless defined(&IGP01E1000_PHY_LINK_HEALTH);
    eval 'sub IGP01E1000_GMII_FIFO () {0x14;}' unless defined(&IGP01E1000_GMII_FIFO);
    eval 'sub IGP01E1000_PHY_CHANNEL_QUALITY () {0x15;}' unless defined(&IGP01E1000_PHY_CHANNEL_QUALITY);
    eval 'sub IGP02E1000_PHY_POWER_MGMT () {0x19;}' unless defined(&IGP02E1000_PHY_POWER_MGMT);
    eval 'sub IGP01E1000_PHY_PAGE_SELECT () {0x1f;}' unless defined(&IGP01E1000_PHY_PAGE_SELECT);
    eval 'sub IGP01E1000_PHY_AGC_A () {0x1172;}' unless defined(&IGP01E1000_PHY_AGC_A);
    eval 'sub IGP01E1000_PHY_AGC_B () {0x1272;}' unless defined(&IGP01E1000_PHY_AGC_B);
    eval 'sub IGP01E1000_PHY_AGC_C () {0x1472;}' unless defined(&IGP01E1000_PHY_AGC_C);
    eval 'sub IGP01E1000_PHY_AGC_D () {0x1872;}' unless defined(&IGP01E1000_PHY_AGC_D);
    eval 'sub IGP02E1000_PHY_AGC_A () {0x11b1;}' unless defined(&IGP02E1000_PHY_AGC_A);
    eval 'sub IGP02E1000_PHY_AGC_B () {0x12b1;}' unless defined(&IGP02E1000_PHY_AGC_B);
    eval 'sub IGP02E1000_PHY_AGC_C () {0x14b1;}' unless defined(&IGP02E1000_PHY_AGC_C);
    eval 'sub IGP02E1000_PHY_AGC_D () {0x18b1;}' unless defined(&IGP02E1000_PHY_AGC_D);
    eval 'sub IGP01E1000_PHY_DSP_RESET () {0x1f33;}' unless defined(&IGP01E1000_PHY_DSP_RESET);
    eval 'sub IGP01E1000_PHY_DSP_SET () {0x1f71;}' unless defined(&IGP01E1000_PHY_DSP_SET);
    eval 'sub IGP01E1000_PHY_DSP_FFE () {0x1f35;}' unless defined(&IGP01E1000_PHY_DSP_FFE);
    eval 'sub IGP01E1000_PHY_CHANNEL_NUM () {4;}' unless defined(&IGP01E1000_PHY_CHANNEL_NUM);
    eval 'sub IGP02E1000_PHY_CHANNEL_NUM () {4;}' unless defined(&IGP02E1000_PHY_CHANNEL_NUM);
    eval 'sub IGP01E1000_PHY_AGC_PARAM_A () {0x1171;}' unless defined(&IGP01E1000_PHY_AGC_PARAM_A);
    eval 'sub IGP01E1000_PHY_AGC_PARAM_B () {0x1271;}' unless defined(&IGP01E1000_PHY_AGC_PARAM_B);
    eval 'sub IGP01E1000_PHY_AGC_PARAM_C () {0x1471;}' unless defined(&IGP01E1000_PHY_AGC_PARAM_C);
    eval 'sub IGP01E1000_PHY_AGC_PARAM_D () {0x1871;}' unless defined(&IGP01E1000_PHY_AGC_PARAM_D);
    eval 'sub IGP01E1000_PHY_EDAC_MU_INDEX () {0xc000;}' unless defined(&IGP01E1000_PHY_EDAC_MU_INDEX);
    eval 'sub IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS () {0x8000;}' unless defined(&IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS);
    eval 'sub IGP01E1000_PHY_ANALOG_TX_STATE () {0x2890;}' unless defined(&IGP01E1000_PHY_ANALOG_TX_STATE);
    eval 'sub IGP01E1000_PHY_ANALOG_CLASS_A () {0x2000;}' unless defined(&IGP01E1000_PHY_ANALOG_CLASS_A);
    eval 'sub IGP01E1000_PHY_FORCE_ANALOG_ENABLE () {0x4;}' unless defined(&IGP01E1000_PHY_FORCE_ANALOG_ENABLE);
    eval 'sub IGP01E1000_PHY_DSP_FFE_CM_CP () {0x69;}' unless defined(&IGP01E1000_PHY_DSP_FFE_CM_CP);
    eval 'sub IGP01E1000_PHY_DSP_FFE_DEFAULT () {0x2a;}' unless defined(&IGP01E1000_PHY_DSP_FFE_DEFAULT);
    eval 'sub IGP01E1000_PHY_PCS_INIT_REG () {0xb4;}' unless defined(&IGP01E1000_PHY_PCS_INIT_REG);
    eval 'sub IGP01E1000_PHY_PCS_CTRL_REG () {0xb5;}' unless defined(&IGP01E1000_PHY_PCS_CTRL_REG);
    eval 'sub IGP01E1000_ANALOG_REGS_PAGE () {0x20c0;}' unless defined(&IGP01E1000_ANALOG_REGS_PAGE);
    eval 'sub GG82563_PAGE_SHIFT () {5;}' unless defined(&GG82563_PAGE_SHIFT);
    eval 'sub GG82563_REG {
        my($page, $reg) = @_;
	    eval q(((($page) <<  &GG82563_PAGE_SHIFT) | (($reg) &  &MAX_PHY_REG_ADDRESS)));
    }' unless defined(&GG82563_REG);
    eval 'sub GG82563_MIN_ALT_REG () {30;}' unless defined(&GG82563_MIN_ALT_REG);
    eval 'sub GG82563_PHY_SPEC_CTRL () { &GG82563_REG(0, 16);}' unless defined(&GG82563_PHY_SPEC_CTRL);
    eval 'sub GG82563_PHY_SPEC_STATUS () { &GG82563_REG(0, 17);}' unless defined(&GG82563_PHY_SPEC_STATUS);
    eval 'sub GG82563_PHY_INT_ENABLE () { &GG82563_REG(0, 18);}' unless defined(&GG82563_PHY_INT_ENABLE);
    eval 'sub GG82563_PHY_SPEC_STATUS_2 () { &GG82563_REG(0, 19);}' unless defined(&GG82563_PHY_SPEC_STATUS_2);
    eval 'sub GG82563_PHY_RX_ERR_CNTR () { &GG82563_REG(0, 21);}' unless defined(&GG82563_PHY_RX_ERR_CNTR);
    eval 'sub GG82563_PHY_PAGE_SELECT () { &GG82563_REG(0, 22);}' unless defined(&GG82563_PHY_PAGE_SELECT);
    eval 'sub GG82563_PHY_SPEC_CTRL_2 () { &GG82563_REG(0, 26);}' unless defined(&GG82563_PHY_SPEC_CTRL_2);
    eval 'sub GG82563_PHY_PAGE_SELECT_ALT () { &GG82563_REG(0, 29);}' unless defined(&GG82563_PHY_PAGE_SELECT_ALT);
    eval 'sub GG82563_PHY_TEST_CLK_CTRL () { &GG82563_REG(0, 30);}' unless defined(&GG82563_PHY_TEST_CLK_CTRL);
    eval 'sub GG82563_PHY_MAC_SPEC_CTRL () { &GG82563_REG(2, 21);}' unless defined(&GG82563_PHY_MAC_SPEC_CTRL);
    eval 'sub GG82563_PHY_MAC_SPEC_CTRL_2 () { &GG82563_REG(2, 26);}' unless defined(&GG82563_PHY_MAC_SPEC_CTRL_2);
    eval 'sub GG82563_PHY_DSP_DISTANCE () { &GG82563_REG(5, 26);}' unless defined(&GG82563_PHY_DSP_DISTANCE);
    eval 'sub GG82563_PHY_KMRN_MODE_CTRL () { &GG82563_REG(193, 16);}' unless defined(&GG82563_PHY_KMRN_MODE_CTRL);
    eval 'sub GG82563_PHY_PORT_RESET () { &GG82563_REG(193, 17);}' unless defined(&GG82563_PHY_PORT_RESET);
    eval 'sub GG82563_PHY_REVISION_ID () { &GG82563_REG(193, 18);}' unless defined(&GG82563_PHY_REVISION_ID);
    eval 'sub GG82563_PHY_DEVICE_ID () { &GG82563_REG(193, 19);}' unless defined(&GG82563_PHY_DEVICE_ID);
    eval 'sub GG82563_PHY_PWR_MGMT_CTRL () { &GG82563_REG(193, 20);}' unless defined(&GG82563_PHY_PWR_MGMT_CTRL);
    eval 'sub GG82563_PHY_RATE_ADAPT_CTRL () { &GG82563_REG(193, 25);}' unless defined(&GG82563_PHY_RATE_ADAPT_CTRL);
    eval 'sub GG82563_PHY_KMRN_FIFO_CTRL_STAT () { &GG82563_REG(194, 16);}' unless defined(&GG82563_PHY_KMRN_FIFO_CTRL_STAT);
    eval 'sub GG82563_PHY_KMRN_CTRL () { &GG82563_REG(194, 17);}' unless defined(&GG82563_PHY_KMRN_CTRL);
    eval 'sub GG82563_PHY_INBAND_CTRL () { &GG82563_REG(194, 18);}' unless defined(&GG82563_PHY_INBAND_CTRL);
    eval 'sub GG82563_PHY_KMRN_DIAGNOSTIC () { &GG82563_REG(194, 19);}' unless defined(&GG82563_PHY_KMRN_DIAGNOSTIC);
    eval 'sub GG82563_PHY_ACK_TIMEOUTS () { &GG82563_REG(194, 20);}' unless defined(&GG82563_PHY_ACK_TIMEOUTS);
    eval 'sub GG82563_PHY_ADV_ABILITY () { &GG82563_REG(194, 21);}' unless defined(&GG82563_PHY_ADV_ABILITY);
    eval 'sub GG82563_PHY_LINK_PARTNER_ADV_ABILITY () { &GG82563_REG(194, 23);}' unless defined(&GG82563_PHY_LINK_PARTNER_ADV_ABILITY);
    eval 'sub GG82563_PHY_ADV_NEXT_PAGE () { &GG82563_REG(194, 24);}' unless defined(&GG82563_PHY_ADV_NEXT_PAGE);
    eval 'sub GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE () { &GG82563_REG(194, 25);}' unless defined(&GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE);
    eval 'sub GG82563_PHY_KMRN_MISC () { &GG82563_REG(194, 26);}' unless defined(&GG82563_PHY_KMRN_MISC);
    eval 'sub MII_CR_SPEED_SELECT_MSB () {0x40;}' unless defined(&MII_CR_SPEED_SELECT_MSB);
    eval 'sub MII_CR_COLL_TEST_ENABLE () {0x80;}' unless defined(&MII_CR_COLL_TEST_ENABLE);
    eval 'sub MII_CR_FULL_DUPLEX () {0x100;}' unless defined(&MII_CR_FULL_DUPLEX);
    eval 'sub MII_CR_RESTART_AUTO_NEG () {0x200;}' unless defined(&MII_CR_RESTART_AUTO_NEG);
    eval 'sub MII_CR_ISOLATE () {0x400;}' unless defined(&MII_CR_ISOLATE);
    eval 'sub MII_CR_POWER_DOWN () {0x800;}' unless defined(&MII_CR_POWER_DOWN);
    eval 'sub MII_CR_AUTO_NEG_EN () {0x1000;}' unless defined(&MII_CR_AUTO_NEG_EN);
    eval 'sub MII_CR_SPEED_SELECT_LSB () {0x2000;}' unless defined(&MII_CR_SPEED_SELECT_LSB);
    eval 'sub MII_CR_LOOPBACK () {0x4000;}' unless defined(&MII_CR_LOOPBACK);
    eval 'sub MII_CR_RESET () {0x8000;}' unless defined(&MII_CR_RESET);
    eval 'sub MII_SR_EXTENDED_CAPS () {0x1;}' unless defined(&MII_SR_EXTENDED_CAPS);
    eval 'sub MII_SR_JABBER_DETECT () {0x2;}' unless defined(&MII_SR_JABBER_DETECT);
    eval 'sub MII_SR_LINK_STATUS () {0x4;}' unless defined(&MII_SR_LINK_STATUS);
    eval 'sub MII_SR_AUTONEG_CAPS () {0x8;}' unless defined(&MII_SR_AUTONEG_CAPS);
    eval 'sub MII_SR_REMOTE_FAULT () {0x10;}' unless defined(&MII_SR_REMOTE_FAULT);
    eval 'sub MII_SR_AUTONEG_COMPLETE () {0x20;}' unless defined(&MII_SR_AUTONEG_COMPLETE);
    eval 'sub MII_SR_PREAMBLE_SUPPRESS () {0x40;}' unless defined(&MII_SR_PREAMBLE_SUPPRESS);
    eval 'sub MII_SR_EXTENDED_STATUS () {0x100;}' unless defined(&MII_SR_EXTENDED_STATUS);
    eval 'sub MII_SR_100T2_HD_CAPS () {0x200;}' unless defined(&MII_SR_100T2_HD_CAPS);
    eval 'sub MII_SR_100T2_FD_CAPS () {0x400;}' unless defined(&MII_SR_100T2_FD_CAPS);
    eval 'sub MII_SR_10T_HD_CAPS () {0x800;}' unless defined(&MII_SR_10T_HD_CAPS);
    eval 'sub MII_SR_10T_FD_CAPS () {0x1000;}' unless defined(&MII_SR_10T_FD_CAPS);
    eval 'sub MII_SR_100X_HD_CAPS () {0x2000;}' unless defined(&MII_SR_100X_HD_CAPS);
    eval 'sub MII_SR_100X_FD_CAPS () {0x4000;}' unless defined(&MII_SR_100X_FD_CAPS);
    eval 'sub MII_SR_100T4_CAPS () {0x8000;}' unless defined(&MII_SR_100T4_CAPS);
    eval 'sub NWAY_AR_SELECTOR_FIELD () {0x1;}' unless defined(&NWAY_AR_SELECTOR_FIELD);
    eval 'sub NWAY_AR_10T_HD_CAPS () {0x20;}' unless defined(&NWAY_AR_10T_HD_CAPS);
    eval 'sub NWAY_AR_10T_FD_CAPS () {0x40;}' unless defined(&NWAY_AR_10T_FD_CAPS);
    eval 'sub NWAY_AR_100TX_HD_CAPS () {0x80;}' unless defined(&NWAY_AR_100TX_HD_CAPS);
    eval 'sub NWAY_AR_100TX_FD_CAPS () {0x100;}' unless defined(&NWAY_AR_100TX_FD_CAPS);
    eval 'sub NWAY_AR_100T4_CAPS () {0x200;}' unless defined(&NWAY_AR_100T4_CAPS);
    eval 'sub NWAY_AR_PAUSE () {0x400;}' unless defined(&NWAY_AR_PAUSE);
    eval 'sub NWAY_AR_ASM_DIR () {0x800;}' unless defined(&NWAY_AR_ASM_DIR);
    eval 'sub NWAY_AR_REMOTE_FAULT () {0x2000;}' unless defined(&NWAY_AR_REMOTE_FAULT);
    eval 'sub NWAY_AR_NEXT_PAGE () {0x8000;}' unless defined(&NWAY_AR_NEXT_PAGE);
    eval 'sub NWAY_LPAR_SELECTOR_FIELD () {0x;}' unless defined(&NWAY_LPAR_SELECTOR_FIELD);
    eval 'sub NWAY_LPAR_10T_HD_CAPS () {0x20;}' unless defined(&NWAY_LPAR_10T_HD_CAPS);
    eval 'sub NWAY_LPAR_10T_FD_CAPS () {0x40;}' unless defined(&NWAY_LPAR_10T_FD_CAPS);
    eval 'sub NWAY_LPAR_100TX_HD_CAPS () {0x80;}' unless defined(&NWAY_LPAR_100TX_HD_CAPS);
    eval 'sub NWAY_LPAR_100TX_FD_CAPS () {0x100;}' unless defined(&NWAY_LPAR_100TX_FD_CAPS);
    eval 'sub NWAY_LPAR_100T4_CAPS () {0x200;}' unless defined(&NWAY_LPAR_100T4_CAPS);
    eval 'sub NWAY_LPAR_PAUSE () {0x400;}' unless defined(&NWAY_LPAR_PAUSE);
    eval 'sub NWAY_LPAR_ASM_DIR () {0x800;}' unless defined(&NWAY_LPAR_ASM_DIR);
    eval 'sub NWAY_LPAR_REMOTE_FAULT () {0x2000;}' unless defined(&NWAY_LPAR_REMOTE_FAULT);
    eval 'sub NWAY_LPAR_ACKNOWLEDGE () {0x4000;}' unless defined(&NWAY_LPAR_ACKNOWLEDGE);
    eval 'sub NWAY_LPAR_NEXT_PAGE () {0x8000;}' unless defined(&NWAY_LPAR_NEXT_PAGE);
    eval 'sub NWAY_ER_LP_NWAY_CAPS () {0x1;}' unless defined(&NWAY_ER_LP_NWAY_CAPS);
    eval 'sub NWAY_ER_PAGE_RXD () {0x2;}' unless defined(&NWAY_ER_PAGE_RXD);
    eval 'sub NWAY_ER_NEXT_PAGE_CAPS () {0x4;}' unless defined(&NWAY_ER_NEXT_PAGE_CAPS);
    eval 'sub NWAY_ER_LP_NEXT_PAGE_CAPS () {0x8;}' unless defined(&NWAY_ER_LP_NEXT_PAGE_CAPS);
    eval 'sub NWAY_ER_PAR_DETECT_FAULT () {0x10;}' unless defined(&NWAY_ER_PAR_DETECT_FAULT);
    eval 'sub NPTX_MSG_CODE_FIELD () {0x1;}' unless defined(&NPTX_MSG_CODE_FIELD);
    eval 'sub NPTX_TOGGLE () {0x800;}' unless defined(&NPTX_TOGGLE);
    eval 'sub NPTX_ACKNOWLDGE2 () {0x1000;}' unless defined(&NPTX_ACKNOWLDGE2);
    eval 'sub NPTX_MSG_PAGE () {0x2000;}' unless defined(&NPTX_MSG_PAGE);
    eval 'sub NPTX_NEXT_PAGE () {0x8000;}' unless defined(&NPTX_NEXT_PAGE);
    eval 'sub LP_RNPR_MSG_CODE_FIELD () {0x1;}' unless defined(&LP_RNPR_MSG_CODE_FIELD);
    eval 'sub LP_RNPR_TOGGLE () {0x800;}' unless defined(&LP_RNPR_TOGGLE);
    eval 'sub LP_RNPR_ACKNOWLDGE2 () {0x1000;}' unless defined(&LP_RNPR_ACKNOWLDGE2);
    eval 'sub LP_RNPR_MSG_PAGE () {0x2000;}' unless defined(&LP_RNPR_MSG_PAGE);
    eval 'sub LP_RNPR_ACKNOWLDGE () {0x4000;}' unless defined(&LP_RNPR_ACKNOWLDGE);
    eval 'sub LP_RNPR_NEXT_PAGE () {0x8000;}' unless defined(&LP_RNPR_NEXT_PAGE);
    eval 'sub CR_1000T_ASYM_PAUSE () {0x80;}' unless defined(&CR_1000T_ASYM_PAUSE);
    eval 'sub CR_1000T_HD_CAPS () {0x100;}' unless defined(&CR_1000T_HD_CAPS);
    eval 'sub CR_1000T_FD_CAPS () {0x200;}' unless defined(&CR_1000T_FD_CAPS);
    eval 'sub CR_1000T_REPEATER_DTE () {0x400;}' unless defined(&CR_1000T_REPEATER_DTE);
    eval 'sub CR_1000T_MS_VALUE () {0x800;}' unless defined(&CR_1000T_MS_VALUE);
    eval 'sub CR_1000T_MS_ENABLE () {0x1000;}' unless defined(&CR_1000T_MS_ENABLE);
    eval 'sub CR_1000T_TEST_MODE_NORMAL () {0x;}' unless defined(&CR_1000T_TEST_MODE_NORMAL);
    eval 'sub CR_1000T_TEST_MODE_1 () {0x2000;}' unless defined(&CR_1000T_TEST_MODE_1);
    eval 'sub CR_1000T_TEST_MODE_2 () {0x4000;}' unless defined(&CR_1000T_TEST_MODE_2);
    eval 'sub CR_1000T_TEST_MODE_3 () {0x6000;}' unless defined(&CR_1000T_TEST_MODE_3);
    eval 'sub CR_1000T_TEST_MODE_4 () {0x8000;}' unless defined(&CR_1000T_TEST_MODE_4);
    eval 'sub SR_1000T_IDLE_ERROR_CNT () {0xff;}' unless defined(&SR_1000T_IDLE_ERROR_CNT);
    eval 'sub SR_1000T_ASYM_PAUSE_DIR () {0x100;}' unless defined(&SR_1000T_ASYM_PAUSE_DIR);
    eval 'sub SR_1000T_LP_HD_CAPS () {0x400;}' unless defined(&SR_1000T_LP_HD_CAPS);
    eval 'sub SR_1000T_LP_FD_CAPS () {0x800;}' unless defined(&SR_1000T_LP_FD_CAPS);
    eval 'sub SR_1000T_REMOTE_RX_STATUS () {0x1000;}' unless defined(&SR_1000T_REMOTE_RX_STATUS);
    eval 'sub SR_1000T_LOCAL_RX_STATUS () {0x2000;}' unless defined(&SR_1000T_LOCAL_RX_STATUS);
    eval 'sub SR_1000T_MS_CONFIG_RES () {0x4000;}' unless defined(&SR_1000T_MS_CONFIG_RES);
    eval 'sub SR_1000T_MS_CONFIG_FAULT () {0x8000;}' unless defined(&SR_1000T_MS_CONFIG_FAULT);
    eval 'sub SR_1000T_REMOTE_RX_STATUS_SHIFT () {12;}' unless defined(&SR_1000T_REMOTE_RX_STATUS_SHIFT);
    eval 'sub SR_1000T_LOCAL_RX_STATUS_SHIFT () {13;}' unless defined(&SR_1000T_LOCAL_RX_STATUS_SHIFT);
    eval 'sub SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT () {5;}' unless defined(&SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT);
    eval 'sub FFE_IDLE_ERR_COUNT_TIMEOUT_20 () {20;}' unless defined(&FFE_IDLE_ERR_COUNT_TIMEOUT_20);
    eval 'sub FFE_IDLE_ERR_COUNT_TIMEOUT_100 () {100;}' unless defined(&FFE_IDLE_ERR_COUNT_TIMEOUT_100);
    eval 'sub IEEE_ESR_1000T_HD_CAPS () {0x1000;}' unless defined(&IEEE_ESR_1000T_HD_CAPS);
    eval 'sub IEEE_ESR_1000T_FD_CAPS () {0x2000;}' unless defined(&IEEE_ESR_1000T_FD_CAPS);
    eval 'sub IEEE_ESR_1000X_HD_CAPS () {0x4000;}' unless defined(&IEEE_ESR_1000X_HD_CAPS);
    eval 'sub IEEE_ESR_1000X_FD_CAPS () {0x8000;}' unless defined(&IEEE_ESR_1000X_FD_CAPS);
    eval 'sub PHY_TX_POLARITY_MASK () {0x100;}' unless defined(&PHY_TX_POLARITY_MASK);
    eval 'sub PHY_TX_NORMAL_POLARITY () {0;}' unless defined(&PHY_TX_NORMAL_POLARITY);
    eval 'sub AUTO_POLARITY_DISABLE () {0x10;}' unless defined(&AUTO_POLARITY_DISABLE);
    eval 'sub M88E1000_PSCR_JABBER_DISABLE () {0x1;}' unless defined(&M88E1000_PSCR_JABBER_DISABLE);
    eval 'sub M88E1000_PSCR_POLARITY_REVERSAL () {0x2;}' unless defined(&M88E1000_PSCR_POLARITY_REVERSAL);
    eval 'sub M88E1000_PSCR_SQE_TEST () {0x4;}' unless defined(&M88E1000_PSCR_SQE_TEST);
    eval 'sub M88E1000_PSCR_CLK125_DISABLE () {0x10;}' unless defined(&M88E1000_PSCR_CLK125_DISABLE);
    eval 'sub M88E1000_PSCR_MDI_MANUAL_MODE () {0x;}' unless defined(&M88E1000_PSCR_MDI_MANUAL_MODE);
    eval 'sub M88E1000_PSCR_MDIX_MANUAL_MODE () {0x20;}' unless defined(&M88E1000_PSCR_MDIX_MANUAL_MODE);
    eval 'sub M88E1000_PSCR_AUTO_X_1000T () {0x40;}' unless defined(&M88E1000_PSCR_AUTO_X_1000T);
    eval 'sub M88E1000_PSCR_AUTO_X_MODE () {0x60;}' unless defined(&M88E1000_PSCR_AUTO_X_MODE);
    eval 'sub M88E1000_PSCR_10BT_EXT_DIST_ENABLE () {0x80;}' unless defined(&M88E1000_PSCR_10BT_EXT_DIST_ENABLE);
    eval 'sub M88E1000_PSCR_MII_5BIT_ENABLE () {0x100;}' unless defined(&M88E1000_PSCR_MII_5BIT_ENABLE);
    eval 'sub M88E1000_PSCR_SCRAMBLER_DISABLE () {0x200;}' unless defined(&M88E1000_PSCR_SCRAMBLER_DISABLE);
    eval 'sub M88E1000_PSCR_FORCE_LINK_GOOD () {0x400;}' unless defined(&M88E1000_PSCR_FORCE_LINK_GOOD);
    eval 'sub M88E1000_PSCR_ASSERT_CRS_ON_TX () {0x800;}' unless defined(&M88E1000_PSCR_ASSERT_CRS_ON_TX);
    eval 'sub M88E1000_PSCR_POLARITY_REVERSAL_SHIFT () {1;}' unless defined(&M88E1000_PSCR_POLARITY_REVERSAL_SHIFT);
    eval 'sub M88E1000_PSCR_AUTO_X_MODE_SHIFT () {5;}' unless defined(&M88E1000_PSCR_AUTO_X_MODE_SHIFT);
    eval 'sub M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT () {7;}' unless defined(&M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT);
    eval 'sub M88E1000_PSSR_JABBER () {0x1;}' unless defined(&M88E1000_PSSR_JABBER);
    eval 'sub M88E1000_PSSR_REV_POLARITY () {0x2;}' unless defined(&M88E1000_PSSR_REV_POLARITY);
    eval 'sub M88E1000_PSSR_DOWNSHIFT () {0x20;}' unless defined(&M88E1000_PSSR_DOWNSHIFT);
    eval 'sub M88E1000_PSSR_MDIX () {0x40;}' unless defined(&M88E1000_PSSR_MDIX);
    eval 'sub M88E1000_PSSR_CABLE_LENGTH () {0x380;}' unless defined(&M88E1000_PSSR_CABLE_LENGTH);
    eval 'sub M88E1000_PSSR_LINK () {0x400;}' unless defined(&M88E1000_PSSR_LINK);
    eval 'sub M88E1000_PSSR_SPD_DPLX_RESOLVED () {0x800;}' unless defined(&M88E1000_PSSR_SPD_DPLX_RESOLVED);
    eval 'sub M88E1000_PSSR_PAGE_RCVD () {0x1000;}' unless defined(&M88E1000_PSSR_PAGE_RCVD);
    eval 'sub M88E1000_PSSR_DPLX () {0x2000;}' unless defined(&M88E1000_PSSR_DPLX);
    eval 'sub M88E1000_PSSR_SPEED () {0xc000;}' unless defined(&M88E1000_PSSR_SPEED);
    eval 'sub M88E1000_PSSR_10MBS () {0x;}' unless defined(&M88E1000_PSSR_10MBS);
    eval 'sub M88E1000_PSSR_100MBS () {0x4000;}' unless defined(&M88E1000_PSSR_100MBS);
    eval 'sub M88E1000_PSSR_1000MBS () {0x8000;}' unless defined(&M88E1000_PSSR_1000MBS);
    eval 'sub M88E1000_PSSR_REV_POLARITY_SHIFT () {1;}' unless defined(&M88E1000_PSSR_REV_POLARITY_SHIFT);
    eval 'sub M88E1000_PSSR_DOWNSHIFT_SHIFT () {5;}' unless defined(&M88E1000_PSSR_DOWNSHIFT_SHIFT);
    eval 'sub M88E1000_PSSR_MDIX_SHIFT () {6;}' unless defined(&M88E1000_PSSR_MDIX_SHIFT);
    eval 'sub M88E1000_PSSR_CABLE_LENGTH_SHIFT () {7;}' unless defined(&M88E1000_PSSR_CABLE_LENGTH_SHIFT);
    eval 'sub M88E1000_EPSCR_FIBER_LOOPBACK () {0x4000;}' unless defined(&M88E1000_EPSCR_FIBER_LOOPBACK);
    eval 'sub M88E1000_EPSCR_DOWN_NO_IDLE () {0x8000;}' unless defined(&M88E1000_EPSCR_DOWN_NO_IDLE);
    eval 'sub M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK () {0xc00;}' unless defined(&M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK);
    eval 'sub M88E1000_EPSCR_MASTER_DOWNSHIFT_1X () {0x;}' unless defined(&M88E1000_EPSCR_MASTER_DOWNSHIFT_1X);
    eval 'sub M88E1000_EPSCR_MASTER_DOWNSHIFT_2X () {0x400;}' unless defined(&M88E1000_EPSCR_MASTER_DOWNSHIFT_2X);
    eval 'sub M88E1000_EPSCR_MASTER_DOWNSHIFT_3X () {0x800;}' unless defined(&M88E1000_EPSCR_MASTER_DOWNSHIFT_3X);
    eval 'sub M88E1000_EPSCR_MASTER_DOWNSHIFT_4X () {0xc00;}' unless defined(&M88E1000_EPSCR_MASTER_DOWNSHIFT_4X);
    eval 'sub M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK () {0x300;}' unless defined(&M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK);
    eval 'sub M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS () {0x;}' unless defined(&M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS);
    eval 'sub M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X () {0x100;}' unless defined(&M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X);
    eval 'sub M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X () {0x200;}' unless defined(&M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X);
    eval 'sub M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X () {0x300;}' unless defined(&M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X);
    eval 'sub M88E1000_EPSCR_TX_CLK_2_5 () {0x60;}' unless defined(&M88E1000_EPSCR_TX_CLK_2_5);
    eval 'sub M88E1000_EPSCR_TX_CLK_25 () {0x70;}' unless defined(&M88E1000_EPSCR_TX_CLK_25);
    eval 'sub M88E1000_EPSCR_TX_CLK_0 () {0x;}' unless defined(&M88E1000_EPSCR_TX_CLK_0);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK () {0xe00;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X () {0x;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X () {0x200;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X () {0x400;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X () {0x600;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X () {0x800;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X () {0xa00;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X () {0xc00;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X);
    eval 'sub M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X () {0xe00;}' unless defined(&M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X);
    eval 'sub IGP01E1000_PSCFR_AUTO_MDIX_PAR_DETECT () {0x10;}' unless defined(&IGP01E1000_PSCFR_AUTO_MDIX_PAR_DETECT);
    eval 'sub IGP01E1000_PSCFR_PRE_EN () {0x20;}' unless defined(&IGP01E1000_PSCFR_PRE_EN);
    eval 'sub IGP01E1000_PSCFR_SMART_SPEED () {0x80;}' unless defined(&IGP01E1000_PSCFR_SMART_SPEED);
    eval 'sub IGP01E1000_PSCFR_DISABLE_TPLOOPBACK () {0x100;}' unless defined(&IGP01E1000_PSCFR_DISABLE_TPLOOPBACK);
    eval 'sub IGP01E1000_PSCFR_DISABLE_JABBER () {0x400;}' unless defined(&IGP01E1000_PSCFR_DISABLE_JABBER);
    eval 'sub IGP01E1000_PSCFR_DISABLE_TRANSMIT () {0x2000;}' unless defined(&IGP01E1000_PSCFR_DISABLE_TRANSMIT);
    eval 'sub IGP01E1000_PSSR_AUTONEG_FAILED () {0x1;}' unless defined(&IGP01E1000_PSSR_AUTONEG_FAILED);
    eval 'sub IGP01E1000_PSSR_POLARITY_REVERSED () {0x2;}' unless defined(&IGP01E1000_PSSR_POLARITY_REVERSED);
    eval 'sub IGP01E1000_PSSR_CABLE_LENGTH () {0x7c;}' unless defined(&IGP01E1000_PSSR_CABLE_LENGTH);
    eval 'sub IGP01E1000_PSSR_FULL_DUPLEX () {0x200;}' unless defined(&IGP01E1000_PSSR_FULL_DUPLEX);
    eval 'sub IGP01E1000_PSSR_LINK_UP () {0x400;}' unless defined(&IGP01E1000_PSSR_LINK_UP);
    eval 'sub IGP01E1000_PSSR_MDIX () {0x800;}' unless defined(&IGP01E1000_PSSR_MDIX);
    eval 'sub IGP01E1000_PSSR_SPEED_MASK () {0xc000;}' unless defined(&IGP01E1000_PSSR_SPEED_MASK);
    eval 'sub IGP01E1000_PSSR_SPEED_10MBPS () {0x4000;}' unless defined(&IGP01E1000_PSSR_SPEED_10MBPS);
    eval 'sub IGP01E1000_PSSR_SPEED_100MBPS () {0x8000;}' unless defined(&IGP01E1000_PSSR_SPEED_100MBPS);
    eval 'sub IGP01E1000_PSSR_SPEED_1000MBPS () {0xc000;}' unless defined(&IGP01E1000_PSSR_SPEED_1000MBPS);
    eval 'sub IGP01E1000_PSSR_CABLE_LENGTH_SHIFT () {0x2;}' unless defined(&IGP01E1000_PSSR_CABLE_LENGTH_SHIFT);
    eval 'sub IGP01E1000_PSSR_MDIX_SHIFT () {0xb;}' unless defined(&IGP01E1000_PSSR_MDIX_SHIFT);
    eval 'sub IGP01E1000_PSCR_TP_LOOPBACK () {0x10;}' unless defined(&IGP01E1000_PSCR_TP_LOOPBACK);
    eval 'sub IGP01E1000_PSCR_CORRECT_NC_SCMBLR () {0x200;}' unless defined(&IGP01E1000_PSCR_CORRECT_NC_SCMBLR);
    eval 'sub IGP01E1000_PSCR_TEN_CRS_SELECT () {0x400;}' unless defined(&IGP01E1000_PSCR_TEN_CRS_SELECT);
    eval 'sub IGP01E1000_PSCR_FLIP_CHIP () {0x800;}' unless defined(&IGP01E1000_PSCR_FLIP_CHIP);
    eval 'sub IGP01E1000_PSCR_AUTO_MDIX () {0x1000;}' unless defined(&IGP01E1000_PSCR_AUTO_MDIX);
    eval 'sub IGP01E1000_PSCR_FORCE_MDI_MDIX () {0x2000;}' unless defined(&IGP01E1000_PSCR_FORCE_MDI_MDIX);
    eval 'sub IGP01E1000_PLHR_SS_DOWNGRADE () {0x8000;}' unless defined(&IGP01E1000_PLHR_SS_DOWNGRADE);
    eval 'sub IGP01E1000_PLHR_GIG_SCRAMBLER_ERROR () {0x4000;}' unless defined(&IGP01E1000_PLHR_GIG_SCRAMBLER_ERROR);
    eval 'sub IGP01E1000_PLHR_MASTER_FAULT () {0x2000;}' unless defined(&IGP01E1000_PLHR_MASTER_FAULT);
    eval 'sub IGP01E1000_PLHR_MASTER_RESOLUTION () {0x1000;}' unless defined(&IGP01E1000_PLHR_MASTER_RESOLUTION);
    eval 'sub IGP01E1000_PLHR_GIG_REM_RCVR_NOK () {0x800;}' unless defined(&IGP01E1000_PLHR_GIG_REM_RCVR_NOK);
    eval 'sub IGP01E1000_PLHR_IDLE_ERROR_CNT_OFLOW () {0x400;}' unless defined(&IGP01E1000_PLHR_IDLE_ERROR_CNT_OFLOW);
    eval 'sub IGP01E1000_PLHR_DATA_ERR_1 () {0x200;}' unless defined(&IGP01E1000_PLHR_DATA_ERR_1);
    eval 'sub IGP01E1000_PLHR_DATA_ERR_0 () {0x100;}' unless defined(&IGP01E1000_PLHR_DATA_ERR_0);
    eval 'sub IGP01E1000_PLHR_AUTONEG_FAULT () {0x40;}' unless defined(&IGP01E1000_PLHR_AUTONEG_FAULT);
    eval 'sub IGP01E1000_PLHR_AUTONEG_ACTIVE () {0x10;}' unless defined(&IGP01E1000_PLHR_AUTONEG_ACTIVE);
    eval 'sub IGP01E1000_PLHR_VALID_CHANNEL_D () {0x8;}' unless defined(&IGP01E1000_PLHR_VALID_CHANNEL_D);
    eval 'sub IGP01E1000_PLHR_VALID_CHANNEL_C () {0x4;}' unless defined(&IGP01E1000_PLHR_VALID_CHANNEL_C);
    eval 'sub IGP01E1000_PLHR_VALID_CHANNEL_B () {0x2;}' unless defined(&IGP01E1000_PLHR_VALID_CHANNEL_B);
    eval 'sub IGP01E1000_PLHR_VALID_CHANNEL_A () {0x1;}' unless defined(&IGP01E1000_PLHR_VALID_CHANNEL_A);
    eval 'sub IGP01E1000_MSE_CHANNEL_D () {0xf;}' unless defined(&IGP01E1000_MSE_CHANNEL_D);
    eval 'sub IGP01E1000_MSE_CHANNEL_C () {0xf0;}' unless defined(&IGP01E1000_MSE_CHANNEL_C);
    eval 'sub IGP01E1000_MSE_CHANNEL_B () {0xf00;}' unless defined(&IGP01E1000_MSE_CHANNEL_B);
    eval 'sub IGP01E1000_MSE_CHANNEL_A () {0xf000;}' unless defined(&IGP01E1000_MSE_CHANNEL_A);
    eval 'sub IGP02E1000_PM_SPD () {0x1;}' unless defined(&IGP02E1000_PM_SPD);
    eval 'sub IGP02E1000_PM_D3_LPLU () {0x4;}' unless defined(&IGP02E1000_PM_D3_LPLU);
    eval 'sub IGP02E1000_PM_D0_LPLU () {0x2;}' unless defined(&IGP02E1000_PM_D0_LPLU);
    eval 'sub DSP_RESET_ENABLE () {0x;}' unless defined(&DSP_RESET_ENABLE);
    eval 'sub DSP_RESET_DISABLE () {0x2;}' unless defined(&DSP_RESET_DISABLE);
    eval 'sub E1000_MAX_DSP_RESETS () {10;}' unless defined(&E1000_MAX_DSP_RESETS);
    eval 'sub IGP01E1000_AGC_LENGTH_SHIFT () {7;}' unless defined(&IGP01E1000_AGC_LENGTH_SHIFT);
    eval 'sub IGP02E1000_AGC_LENGTH_SHIFT () {9;}' unless defined(&IGP02E1000_AGC_LENGTH_SHIFT);
    eval 'sub IGP02E1000_AGC_LENGTH_MASK () {0x7f;}' unless defined(&IGP02E1000_AGC_LENGTH_MASK);
    eval 'sub IGP01E1000_AGC_LENGTH_TABLE_SIZE () {128;}' unless defined(&IGP01E1000_AGC_LENGTH_TABLE_SIZE);
    eval 'sub IGP02E1000_AGC_LENGTH_TABLE_SIZE () {113;}' unless defined(&IGP02E1000_AGC_LENGTH_TABLE_SIZE);
    eval 'sub IGP01E1000_AGC_RANGE () {10;}' unless defined(&IGP01E1000_AGC_RANGE);
    eval 'sub IGP02E1000_AGC_RANGE () {15;}' unless defined(&IGP02E1000_AGC_RANGE);
    eval 'sub IGP01E1000_PHY_POLARITY_MASK () {0x78;}' unless defined(&IGP01E1000_PHY_POLARITY_MASK);
    eval 'sub IGP01E1000_GMII_FLEX_SPD () {0x10;}' unless defined(&IGP01E1000_GMII_FLEX_SPD);
    eval 'sub IGP01E1000_GMII_SPD () {0x20;}' unless defined(&IGP01E1000_GMII_SPD);
    eval 'sub IGP01E1000_ANALOG_SPARE_FUSE_STATUS () {0x20d1;}' unless defined(&IGP01E1000_ANALOG_SPARE_FUSE_STATUS);
    eval 'sub IGP01E1000_ANALOG_FUSE_STATUS () {0x20d0;}' unless defined(&IGP01E1000_ANALOG_FUSE_STATUS);
    eval 'sub IGP01E1000_ANALOG_FUSE_CONTROL () {0x20dc;}' unless defined(&IGP01E1000_ANALOG_FUSE_CONTROL);
    eval 'sub IGP01E1000_ANALOG_FUSE_BYPASS () {0x20de;}' unless defined(&IGP01E1000_ANALOG_FUSE_BYPASS);
    eval 'sub IGP01E1000_ANALOG_FUSE_POLY_MASK () {0xf000;}' unless defined(&IGP01E1000_ANALOG_FUSE_POLY_MASK);
    eval 'sub IGP01E1000_ANALOG_FUSE_FINE_MASK () {0xf80;}' unless defined(&IGP01E1000_ANALOG_FUSE_FINE_MASK);
    eval 'sub IGP01E1000_ANALOG_FUSE_COARSE_MASK () {0x70;}' unless defined(&IGP01E1000_ANALOG_FUSE_COARSE_MASK);
    eval 'sub IGP01E1000_ANALOG_SPARE_FUSE_ENABLED () {0x100;}' unless defined(&IGP01E1000_ANALOG_SPARE_FUSE_ENABLED);
    eval 'sub IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL () {0x2;}' unless defined(&IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL);
    eval 'sub IGP01E1000_ANALOG_FUSE_COARSE_THRESH () {0x40;}' unless defined(&IGP01E1000_ANALOG_FUSE_COARSE_THRESH);
    eval 'sub IGP01E1000_ANALOG_FUSE_COARSE_10 () {0x10;}' unless defined(&IGP01E1000_ANALOG_FUSE_COARSE_10);
    eval 'sub IGP01E1000_ANALOG_FUSE_FINE_1 () {0x80;}' unless defined(&IGP01E1000_ANALOG_FUSE_FINE_1);
    eval 'sub IGP01E1000_ANALOG_FUSE_FINE_10 () {0x500;}' unless defined(&IGP01E1000_ANALOG_FUSE_FINE_10);
    eval 'sub GG82563_PSCR_DISABLE_JABBER () {0x1;}' unless defined(&GG82563_PSCR_DISABLE_JABBER);
    eval 'sub GG82563_PSCR_POLARITY_REVERSAL_DISABLE () {0x2;}' unless defined(&GG82563_PSCR_POLARITY_REVERSAL_DISABLE);
    eval 'sub GG82563_PSCR_POWER_DOWN () {0x4;}' unless defined(&GG82563_PSCR_POWER_DOWN);
    eval 'sub GG82563_PSCR_COPPER_TRANSMITER_DISABLE () {0x8;}' unless defined(&GG82563_PSCR_COPPER_TRANSMITER_DISABLE);
    eval 'sub GG82563_PSCR_CROSSOVER_MODE_MASK () {0x60;}' unless defined(&GG82563_PSCR_CROSSOVER_MODE_MASK);
    eval 'sub GG82563_PSCR_CROSSOVER_MODE_MDI () {0x;}' unless defined(&GG82563_PSCR_CROSSOVER_MODE_MDI);
    eval 'sub GG82563_PSCR_CROSSOVER_MODE_MDIX () {0x20;}' unless defined(&GG82563_PSCR_CROSSOVER_MODE_MDIX);
    eval 'sub GG82563_PSCR_CROSSOVER_MODE_AUTO () {0x60;}' unless defined(&GG82563_PSCR_CROSSOVER_MODE_AUTO);
    eval 'sub GG82563_PSCR_ENALBE_EXTENDED_DISTANCE () {0x80;}' unless defined(&GG82563_PSCR_ENALBE_EXTENDED_DISTANCE);
    eval 'sub GG82563_PSCR_ENERGY_DETECT_MASK () {0x300;}' unless defined(&GG82563_PSCR_ENERGY_DETECT_MASK);
    eval 'sub GG82563_PSCR_ENERGY_DETECT_OFF () {0x;}' unless defined(&GG82563_PSCR_ENERGY_DETECT_OFF);
    eval 'sub GG82563_PSCR_ENERGY_DETECT_RX () {0x200;}' unless defined(&GG82563_PSCR_ENERGY_DETECT_RX);
    eval 'sub GG82563_PSCR_ENERGY_DETECT_RX_TM () {0x300;}' unless defined(&GG82563_PSCR_ENERGY_DETECT_RX_TM);
    eval 'sub GG82563_PSCR_FORCE_LINK_GOOD () {0x400;}' unless defined(&GG82563_PSCR_FORCE_LINK_GOOD);
    eval 'sub GG82563_PSCR_DOWNSHIFT_ENABLE () {0x800;}' unless defined(&GG82563_PSCR_DOWNSHIFT_ENABLE);
    eval 'sub GG82563_PSCR_DOWNSHIFT_COUNTER_MASK () {0x7000;}' unless defined(&GG82563_PSCR_DOWNSHIFT_COUNTER_MASK);
    eval 'sub GG82563_PSCR_DOWNSHIFT_COUNTER_SHIFT () {12;}' unless defined(&GG82563_PSCR_DOWNSHIFT_COUNTER_SHIFT);
    eval 'sub GG82563_PSSR_JABBER () {0x1;}' unless defined(&GG82563_PSSR_JABBER);
    eval 'sub GG82563_PSSR_POLARITY () {0x2;}' unless defined(&GG82563_PSSR_POLARITY);
    eval 'sub GG82563_PSSR_LINK () {0x8;}' unless defined(&GG82563_PSSR_LINK);
    eval 'sub GG82563_PSSR_ENERGY_DETECT () {0x10;}' unless defined(&GG82563_PSSR_ENERGY_DETECT);
    eval 'sub GG82563_PSSR_DOWNSHIFT () {0x20;}' unless defined(&GG82563_PSSR_DOWNSHIFT);
    eval 'sub GG82563_PSSR_CROSSOVER_STATUS () {0x40;}' unless defined(&GG82563_PSSR_CROSSOVER_STATUS);
    eval 'sub GG82563_PSSR_RX_PAUSE_ENABLED () {0x100;}' unless defined(&GG82563_PSSR_RX_PAUSE_ENABLED);
    eval 'sub GG82563_PSSR_TX_PAUSE_ENABLED () {0x200;}' unless defined(&GG82563_PSSR_TX_PAUSE_ENABLED);
    eval 'sub GG82563_PSSR_LINK_UP () {0x400;}' unless defined(&GG82563_PSSR_LINK_UP);
    eval 'sub GG82563_PSSR_SPEED_DUPLEX_RESOLVED () {0x800;}' unless defined(&GG82563_PSSR_SPEED_DUPLEX_RESOLVED);
    eval 'sub GG82563_PSSR_PAGE_RECEIVED () {0x1000;}' unless defined(&GG82563_PSSR_PAGE_RECEIVED);
    eval 'sub GG82563_PSSR_DUPLEX () {0x2000;}' unless defined(&GG82563_PSSR_DUPLEX);
    eval 'sub GG82563_PSSR_SPEED_MASK () {0xc000;}' unless defined(&GG82563_PSSR_SPEED_MASK);
    eval 'sub GG82563_PSSR_SPEED_10MBPS () {0x;}' unless defined(&GG82563_PSSR_SPEED_10MBPS);
    eval 'sub GG82563_PSSR_SPEED_100MBPS () {0x4000;}' unless defined(&GG82563_PSSR_SPEED_100MBPS);
    eval 'sub GG82563_PSSR_SPEED_1000MBPS () {0x8000;}' unless defined(&GG82563_PSSR_SPEED_1000MBPS);
    eval 'sub GG82563_PSSR2_JABBER () {0x1;}' unless defined(&GG82563_PSSR2_JABBER);
    eval 'sub GG82563_PSSR2_POLARITY_CHANGED () {0x2;}' unless defined(&GG82563_PSSR2_POLARITY_CHANGED);
    eval 'sub GG82563_PSSR2_ENERGY_DETECT_CHANGED () {0x10;}' unless defined(&GG82563_PSSR2_ENERGY_DETECT_CHANGED);
    eval 'sub GG82563_PSSR2_DOWNSHIFT_INTERRUPT () {0x20;}' unless defined(&GG82563_PSSR2_DOWNSHIFT_INTERRUPT);
    eval 'sub GG82563_PSSR2_MDI_CROSSOVER_CHANGE () {0x40;}' unless defined(&GG82563_PSSR2_MDI_CROSSOVER_CHANGE);
    eval 'sub GG82563_PSSR2_FALSE_CARRIER () {0x100;}' unless defined(&GG82563_PSSR2_FALSE_CARRIER);
    eval 'sub GG82563_PSSR2_SYMBOL_ERROR () {0x200;}' unless defined(&GG82563_PSSR2_SYMBOL_ERROR);
    eval 'sub GG82563_PSSR2_LINK_STATUS_CHANGED () {0x400;}' unless defined(&GG82563_PSSR2_LINK_STATUS_CHANGED);
    eval 'sub GG82563_PSSR2_AUTO_NEG_COMPLETED () {0x800;}' unless defined(&GG82563_PSSR2_AUTO_NEG_COMPLETED);
    eval 'sub GG82563_PSSR2_PAGE_RECEIVED () {0x1000;}' unless defined(&GG82563_PSSR2_PAGE_RECEIVED);
    eval 'sub GG82563_PSSR2_DUPLEX_CHANGED () {0x2000;}' unless defined(&GG82563_PSSR2_DUPLEX_CHANGED);
    eval 'sub GG82563_PSSR2_SPEED_CHANGED () {0x4000;}' unless defined(&GG82563_PSSR2_SPEED_CHANGED);
    eval 'sub GG82563_PSSR2_AUTO_NEG_ERROR () {0x8000;}' unless defined(&GG82563_PSSR2_AUTO_NEG_ERROR);
    eval 'sub GG82563_PSCR2_10BT_POLARITY_FORCE () {0x2;}' unless defined(&GG82563_PSCR2_10BT_POLARITY_FORCE);
    eval 'sub GG82563_PSCR2_1000MB_TEST_SELECT_MASK () {0xc;}' unless defined(&GG82563_PSCR2_1000MB_TEST_SELECT_MASK);
    eval 'sub GG82563_PSCR2_1000MB_TEST_SELECT_NORMAL () {0x;}' unless defined(&GG82563_PSCR2_1000MB_TEST_SELECT_NORMAL);
    eval 'sub GG82563_PSCR2_1000MB_TEST_SELECT_112NS () {0x8;}' unless defined(&GG82563_PSCR2_1000MB_TEST_SELECT_112NS);
    eval 'sub GG82563_PSCR2_1000MB_TEST_SELECT_16NS () {0xc;}' unless defined(&GG82563_PSCR2_1000MB_TEST_SELECT_16NS);
    eval 'sub GG82563_PSCR2_REVERSE_AUTO_NEG () {0x2000;}' unless defined(&GG82563_PSCR2_REVERSE_AUTO_NEG);
    eval 'sub GG82563_PSCR2_1000BT_DISABLE () {0x4000;}' unless defined(&GG82563_PSCR2_1000BT_DISABLE);
    eval 'sub GG82563_PSCR2_TRANSMITER_TYPE_MASK () {0x8000;}' unless defined(&GG82563_PSCR2_TRANSMITER_TYPE_MASK);
    eval 'sub GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_B () {0x;}' unless defined(&GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_B);
    eval 'sub GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_A () {0x8000;}' unless defined(&GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_A);
    eval 'sub GG82563_MSCR_TX_CLK_MASK () {0x7;}' unless defined(&GG82563_MSCR_TX_CLK_MASK);
    eval 'sub GG82563_MSCR_TX_CLK_10MBPS_2_5MHZ () {0x4;}' unless defined(&GG82563_MSCR_TX_CLK_10MBPS_2_5MHZ);
    eval 'sub GG82563_MSCR_TX_CLK_100MBPS_25MHZ () {0x5;}' unless defined(&GG82563_MSCR_TX_CLK_100MBPS_25MHZ);
    eval 'sub GG82563_MSCR_TX_CLK_1000MBPS_2_5MHZ () {0x6;}' unless defined(&GG82563_MSCR_TX_CLK_1000MBPS_2_5MHZ);
    eval 'sub GG82563_MSCR_TX_CLK_1000MBPS_25MHZ () {0x7;}' unless defined(&GG82563_MSCR_TX_CLK_1000MBPS_25MHZ);
    eval 'sub GG82563_MSCR_ASSERT_CRS_ON_TX () {0x10;}' unless defined(&GG82563_MSCR_ASSERT_CRS_ON_TX);
    eval 'sub GG82563_DSPD_CABLE_LENGTH () {0x7;}' unless defined(&GG82563_DSPD_CABLE_LENGTH);
    eval 'sub GG82563_KMCR_PHY_LEDS_EN () {0x20;}' unless defined(&GG82563_KMCR_PHY_LEDS_EN);
    eval 'sub GG82563_KMCR_FORCE_LINK_UP () {0x40;}' unless defined(&GG82563_KMCR_FORCE_LINK_UP);
    eval 'sub GG82563_KMCR_SUPPRESS_SGMII_EPD_EXT () {0x80;}' unless defined(&GG82563_KMCR_SUPPRESS_SGMII_EPD_EXT);
    eval 'sub GG82563_KMCR_MDIO_BUS_SPEED_SELECT_MASK () {0x400;}' unless defined(&GG82563_KMCR_MDIO_BUS_SPEED_SELECT_MASK);
    eval 'sub GG82563_KMCR_MDIO_BUS_SPEED_SELECT () {0x400;}' unless defined(&GG82563_KMCR_MDIO_BUS_SPEED_SELECT);
    eval 'sub GG82563_KMCR_PASS_FALSE_CARRIER () {0x800;}' unless defined(&GG82563_KMCR_PASS_FALSE_CARRIER);
    eval 'sub GG82563_PMCR_ENABLE_ELECTRICAL_IDLE () {0x1;}' unless defined(&GG82563_PMCR_ENABLE_ELECTRICAL_IDLE);
    eval 'sub GG82563_PMCR_DISABLE_PORT () {0x2;}' unless defined(&GG82563_PMCR_DISABLE_PORT);
    eval 'sub GG82563_PMCR_DISABLE_SERDES () {0x4;}' unless defined(&GG82563_PMCR_DISABLE_SERDES);
    eval 'sub GG82563_PMCR_REVERSE_AUTO_NEG () {0x8;}' unless defined(&GG82563_PMCR_REVERSE_AUTO_NEG);
    eval 'sub GG82563_PMCR_DISABLE_1000_NON_D0 () {0x10;}' unless defined(&GG82563_PMCR_DISABLE_1000_NON_D0);
    eval 'sub GG82563_PMCR_DISABLE_1000 () {0x20;}' unless defined(&GG82563_PMCR_DISABLE_1000);
    eval 'sub GG82563_PMCR_REVERSE_AUTO_NEG_D0A () {0x40;}' unless defined(&GG82563_PMCR_REVERSE_AUTO_NEG_D0A);
    eval 'sub GG82563_PMCR_FORCE_POWER_STATE () {0x80;}' unless defined(&GG82563_PMCR_FORCE_POWER_STATE);
    eval 'sub GG82563_PMCR_PROGRAMMED_POWER_STATE_MASK () {0x300;}' unless defined(&GG82563_PMCR_PROGRAMMED_POWER_STATE_MASK);
    eval 'sub GG82563_PMCR_PROGRAMMED_POWER_STATE_DR () {0x;}' unless defined(&GG82563_PMCR_PROGRAMMED_POWER_STATE_DR);
    eval 'sub GG82563_PMCR_PROGRAMMED_POWER_STATE_D0U () {0x100;}' unless defined(&GG82563_PMCR_PROGRAMMED_POWER_STATE_D0U);
    eval 'sub GG82563_PMCR_PROGRAMMED_POWER_STATE_D0A () {0x200;}' unless defined(&GG82563_PMCR_PROGRAMMED_POWER_STATE_D0A);
    eval 'sub GG82563_PMCR_PROGRAMMED_POWER_STATE_D3 () {0x300;}' unless defined(&GG82563_PMCR_PROGRAMMED_POWER_STATE_D3);
    eval 'sub GG82563_ICR_DIS_PADDING () {0x10;}' unless defined(&GG82563_ICR_DIS_PADDING);
    eval 'sub M88_VENDOR () {0x141;}' unless defined(&M88_VENDOR);
    eval 'sub M88E1000_E_PHY_ID () {0x1410c50;}' unless defined(&M88E1000_E_PHY_ID);
    eval 'sub M88E1000_I_PHY_ID () {0x1410c30;}' unless defined(&M88E1000_I_PHY_ID);
    eval 'sub M88E1011_I_PHY_ID () {0x1410c20;}' unless defined(&M88E1011_I_PHY_ID);
    eval 'sub IGP01E1000_I_PHY_ID () {0x2a80380;}' unless defined(&IGP01E1000_I_PHY_ID);
    eval 'sub M88E1000_12_PHY_ID () { &M88E1000_E_PHY_ID;}' unless defined(&M88E1000_12_PHY_ID);
    eval 'sub M88E1000_14_PHY_ID () { &M88E1000_E_PHY_ID;}' unless defined(&M88E1000_14_PHY_ID);
    eval 'sub M88E1011_I_REV_4 () {0x4;}' unless defined(&M88E1011_I_REV_4);
    eval 'sub M88E1111_I_PHY_ID () {0x1410cc0;}' unless defined(&M88E1111_I_PHY_ID);
    eval 'sub L1LXT971A_PHY_ID () {0x1378e0;}' unless defined(&L1LXT971A_PHY_ID);
    eval 'sub GG82563_E_PHY_ID () {0x1410ca0;}' unless defined(&GG82563_E_PHY_ID);
    eval 'sub PHY_PAGE_SHIFT () {5;}' unless defined(&PHY_PAGE_SHIFT);
    eval 'sub PHY_REG {
        my($page, $reg) = @_;
	    eval q(((($page) <<  &PHY_PAGE_SHIFT) | (($reg) &  &MAX_PHY_REG_ADDRESS)));
    }' unless defined(&PHY_REG);
    eval 'sub IGP3_PHY_PORT_CTRL () { &PHY_REG(769, 17);}' unless defined(&IGP3_PHY_PORT_CTRL);
    eval 'sub IGP3_PHY_RATE_ADAPT_CTRL () { &PHY_REG(769, 25);}' unless defined(&IGP3_PHY_RATE_ADAPT_CTRL);
    eval 'sub IGP3_KMRN_FIFO_CTRL_STATS () { &PHY_REG(770, 16);}' unless defined(&IGP3_KMRN_FIFO_CTRL_STATS);
    eval 'sub IGP3_KMRN_POWER_MNG_CTRL () { &PHY_REG(770, 17);}' unless defined(&IGP3_KMRN_POWER_MNG_CTRL);
    eval 'sub IGP3_KMRN_INBAND_CTRL () { &PHY_REG(770, 18);}' unless defined(&IGP3_KMRN_INBAND_CTRL);
    eval 'sub IGP3_KMRN_DIAG () { &PHY_REG(770, 19);}' unless defined(&IGP3_KMRN_DIAG);
    eval 'sub IGP3_KMRN_DIAG_PCS_LOCK_LOSS () {0x2;}' unless defined(&IGP3_KMRN_DIAG_PCS_LOCK_LOSS);
    eval 'sub IGP3_KMRN_ACK_TIMEOUT () { &PHY_REG(770, 20);}' unless defined(&IGP3_KMRN_ACK_TIMEOUT);
    eval 'sub IGP3_VR_CTRL () { &PHY_REG(776, 18);}' unless defined(&IGP3_VR_CTRL);
    eval 'sub IGP3_VR_CTRL_MODE_SHUT () {0x200;}' unless defined(&IGP3_VR_CTRL_MODE_SHUT);
    eval 'sub IGP3_VR_CTRL_MODE_MASK () {0x300;}' unless defined(&IGP3_VR_CTRL_MODE_MASK);
    eval 'sub IGP3_CAPABILITY () { &PHY_REG(776, 19);}' unless defined(&IGP3_CAPABILITY);
    eval 'sub IGP3_CAP_INITIATE_TEAM () {0x1;}' unless defined(&IGP3_CAP_INITIATE_TEAM);
    eval 'sub IGP3_CAP_WFM () {0x2;}' unless defined(&IGP3_CAP_WFM);
    eval 'sub IGP3_CAP_ASF () {0x4;}' unless defined(&IGP3_CAP_ASF);
    eval 'sub IGP3_CAP_LPLU () {0x8;}' unless defined(&IGP3_CAP_LPLU);
    eval 'sub IGP3_CAP_DC_AUTO_SPEED () {0x10;}' unless defined(&IGP3_CAP_DC_AUTO_SPEED);
    eval 'sub IGP3_CAP_SPD () {0x20;}' unless defined(&IGP3_CAP_SPD);
    eval 'sub IGP3_CAP_MULT_QUEUE () {0x40;}' unless defined(&IGP3_CAP_MULT_QUEUE);
    eval 'sub IGP3_CAP_RSS () {0x80;}' unless defined(&IGP3_CAP_RSS);
    eval 'sub IGP3_CAP_8021PQ () {0x100;}' unless defined(&IGP3_CAP_8021PQ);
    eval 'sub IGP3_CAP_AMT_CB () {0x200;}' unless defined(&IGP3_CAP_AMT_CB);
    eval 'sub IGP3_PPC_JORDAN_EN () {0x1;}' unless defined(&IGP3_PPC_JORDAN_EN);
    eval 'sub IGP3_PPC_JORDAN_GIGA_SPEED () {0x2;}' unless defined(&IGP3_PPC_JORDAN_GIGA_SPEED);
    eval 'sub IGP3_KMRN_PMC_EE_IDLE_LINK_DIS () {0x1;}' unless defined(&IGP3_KMRN_PMC_EE_IDLE_LINK_DIS);
    eval 'sub IGP3_KMRN_PMC_K0S_ENTRY_LATENCY_MASK () {0x1e;}' unless defined(&IGP3_KMRN_PMC_K0S_ENTRY_LATENCY_MASK);
    eval 'sub IGP3_KMRN_PMC_K0S_MODE1_EN_GIGA () {0x20;}' unless defined(&IGP3_KMRN_PMC_K0S_MODE1_EN_GIGA);
    eval 'sub IGP3_KMRN_PMC_K0S_MODE1_EN_100 () {0x40;}' unless defined(&IGP3_KMRN_PMC_K0S_MODE1_EN_100);
    eval 'sub IGP3E1000_PHY_MISC_CTRL () {0x1b;}' unless defined(&IGP3E1000_PHY_MISC_CTRL);
    eval 'sub IGP3_PHY_MISC_DUPLEX_MANUAL_SET () {0x1000;}' unless defined(&IGP3_PHY_MISC_DUPLEX_MANUAL_SET);
    eval 'sub IGP3_KMRN_EXT_CTRL () { &PHY_REG(770, 18);}' unless defined(&IGP3_KMRN_EXT_CTRL);
    eval 'sub IGP3_KMRN_EC_DIS_INBAND () {0x80;}' unless defined(&IGP3_KMRN_EC_DIS_INBAND);
    eval 'sub IGP03E1000_E_PHY_ID () {0x2a80390;}' unless defined(&IGP03E1000_E_PHY_ID);
    eval 'sub IFE_E_PHY_ID () {0x2a80330;}' unless defined(&IFE_E_PHY_ID);
    eval 'sub IFE_PLUS_E_PHY_ID () {0x2a80320;}' unless defined(&IFE_PLUS_E_PHY_ID);
    eval 'sub IFE_C_E_PHY_ID () {0x2a80310;}' unless defined(&IFE_C_E_PHY_ID);
    eval 'sub IFE_PHY_EXTENDED_STATUS_CONTROL () {0x10;}' unless defined(&IFE_PHY_EXTENDED_STATUS_CONTROL);
    eval 'sub IFE_PHY_SPECIAL_CONTROL () {0x11;}' unless defined(&IFE_PHY_SPECIAL_CONTROL);
    eval 'sub IFE_PHY_RCV_FALSE_CARRIER () {0x13;}' unless defined(&IFE_PHY_RCV_FALSE_CARRIER);
    eval 'sub IFE_PHY_RCV_DISCONNECT () {0x14;}' unless defined(&IFE_PHY_RCV_DISCONNECT);
    eval 'sub IFE_PHY_RCV_ERROT_FRAME () {0x15;}' unless defined(&IFE_PHY_RCV_ERROT_FRAME);
    eval 'sub IFE_PHY_RCV_SYMBOL_ERR () {0x16;}' unless defined(&IFE_PHY_RCV_SYMBOL_ERR);
    eval 'sub IFE_PHY_PREM_EOF_ERR () {0x17;}' unless defined(&IFE_PHY_PREM_EOF_ERR);
    eval 'sub IFE_PHY_RCV_EOF_ERR () {0x18;}' unless defined(&IFE_PHY_RCV_EOF_ERR);
    eval 'sub IFE_PHY_TX_JABBER_DETECT () {0x19;}' unless defined(&IFE_PHY_TX_JABBER_DETECT);
    eval 'sub IFE_PHY_EQUALIZER () {0x1a;}' unless defined(&IFE_PHY_EQUALIZER);
    eval 'sub IFE_PHY_SPECIAL_CONTROL_LED () {0x1b;}' unless defined(&IFE_PHY_SPECIAL_CONTROL_LED);
    eval 'sub IFE_PHY_MDIX_CONTROL () {0x1c;}' unless defined(&IFE_PHY_MDIX_CONTROL);
    eval 'sub IFE_PHY_HWI_CONTROL () {0x1d;}' unless defined(&IFE_PHY_HWI_CONTROL);
    eval 'sub IFE_PESC_REDUCED_POWER_DOWN_DISABLE () {0x2000;}' unless defined(&IFE_PESC_REDUCED_POWER_DOWN_DISABLE);
    eval 'sub IFE_PESC_100BTX_POWER_DOWN () {0x400;}' unless defined(&IFE_PESC_100BTX_POWER_DOWN);
    eval 'sub IFE_PESC_10BTX_POWER_DOWN () {0x200;}' unless defined(&IFE_PESC_10BTX_POWER_DOWN);
    eval 'sub IFE_PESC_POLARITY_REVERSED () {0x100;}' unless defined(&IFE_PESC_POLARITY_REVERSED);
    eval 'sub IFE_PESC_PHY_ADDR_MASK () {0x7c;}' unless defined(&IFE_PESC_PHY_ADDR_MASK);
    eval 'sub IFE_PESC_SPEED () {0x2;}' unless defined(&IFE_PESC_SPEED);
    eval 'sub IFE_PESC_DUPLEX () {0x1;}' unless defined(&IFE_PESC_DUPLEX);
    eval 'sub IFE_PESC_POLARITY_REVERSED_SHIFT () {8;}' unless defined(&IFE_PESC_POLARITY_REVERSED_SHIFT);
    eval 'sub IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN () {0x100;}' unless defined(&IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN);
    eval 'sub IFE_PSC_FORCE_POLARITY () {0x20;}' unless defined(&IFE_PSC_FORCE_POLARITY);
    eval 'sub IFE_PSC_AUTO_POLARITY_DISABLE () {0x10;}' unless defined(&IFE_PSC_AUTO_POLARITY_DISABLE);
    eval 'sub IFE_PSC_JABBER_FUNC_DISABLE () {0x1;}' unless defined(&IFE_PSC_JABBER_FUNC_DISABLE);
    eval 'sub IFE_PSC_FORCE_POLARITY_SHIFT () {5;}' unless defined(&IFE_PSC_FORCE_POLARITY_SHIFT);
    eval 'sub IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT () {4;}' unless defined(&IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT);
    eval 'sub IFE_PMC_AUTO_MDIX () {0x80;}' unless defined(&IFE_PMC_AUTO_MDIX);
    eval 'sub IFE_PMC_FORCE_MDIX () {0x40;}' unless defined(&IFE_PMC_FORCE_MDIX);
    eval 'sub IFE_PMC_MDIX_STATUS () {0x20;}' unless defined(&IFE_PMC_MDIX_STATUS);
    eval 'sub IFE_PMC_AUTO_MDIX_COMPLETE () {0x10;}' unless defined(&IFE_PMC_AUTO_MDIX_COMPLETE);
    eval 'sub IFE_PMC_MDIX_MODE_SHIFT () {6;}' unless defined(&IFE_PMC_MDIX_MODE_SHIFT);
    eval 'sub IFE_PHC_MDIX_RESET_ALL_MASK () {0x;}' unless defined(&IFE_PHC_MDIX_RESET_ALL_MASK);
    eval 'sub IFE_PHC_HWI_ENABLE () {0x8000;}' unless defined(&IFE_PHC_HWI_ENABLE);
    eval 'sub IFE_PHC_ABILITY_CHECK () {0x4000;}' unless defined(&IFE_PHC_ABILITY_CHECK);
    eval 'sub IFE_PHC_TEST_EXEC () {0x2000;}' unless defined(&IFE_PHC_TEST_EXEC);
    eval 'sub IFE_PHC_HIGHZ () {0x200;}' unless defined(&IFE_PHC_HIGHZ);
    eval 'sub IFE_PHC_LOWZ () {0x400;}' unless defined(&IFE_PHC_LOWZ);
    eval 'sub IFE_PHC_LOW_HIGH_Z_MASK () {0x600;}' unless defined(&IFE_PHC_LOW_HIGH_Z_MASK);
    eval 'sub IFE_PHC_DISTANCE_MASK () {0x1ff;}' unless defined(&IFE_PHC_DISTANCE_MASK);
    eval 'sub IFE_PHC_RESET_ALL_MASK () {0x;}' unless defined(&IFE_PHC_RESET_ALL_MASK);
    eval 'sub IFE_PSCL_PROBE_MODE () {0x20;}' unless defined(&IFE_PSCL_PROBE_MODE);
    eval 'sub IFE_PSCL_PROBE_LEDS_OFF () {0x6;}' unless defined(&IFE_PSCL_PROBE_LEDS_OFF);
    eval 'sub IFE_PSCL_PROBE_LEDS_ON () {0x7;}' unless defined(&IFE_PSCL_PROBE_LEDS_ON);
    eval 'sub ICH_FLASH_COMMAND_TIMEOUT () {5000;}' unless defined(&ICH_FLASH_COMMAND_TIMEOUT);
    eval 'sub ICH_FLASH_ERASE_TIMEOUT () {3000000;}' unless defined(&ICH_FLASH_ERASE_TIMEOUT);
    eval 'sub ICH_FLASH_CYCLE_REPEAT_COUNT () {10;}' unless defined(&ICH_FLASH_CYCLE_REPEAT_COUNT);
    eval 'sub ICH_FLASH_SEG_SIZE_256 () {256;}' unless defined(&ICH_FLASH_SEG_SIZE_256);
    eval 'sub ICH_FLASH_SEG_SIZE_4K () {4096;}' unless defined(&ICH_FLASH_SEG_SIZE_4K);
    eval 'sub ICH_FLASH_SEG_SIZE_64K () {65536;}' unless defined(&ICH_FLASH_SEG_SIZE_64K);
    eval 'sub ICH_CYCLE_READ () {0x;}' unless defined(&ICH_CYCLE_READ);
    eval 'sub ICH_CYCLE_RESERVED () {0x1;}' unless defined(&ICH_CYCLE_RESERVED);
    eval 'sub ICH_CYCLE_WRITE () {0x2;}' unless defined(&ICH_CYCLE_WRITE);
    eval 'sub ICH_CYCLE_ERASE () {0x3;}' unless defined(&ICH_CYCLE_ERASE);
    eval 'sub ICH_FLASH_GFPREG () {0x;}' unless defined(&ICH_FLASH_GFPREG);
    eval 'sub ICH_FLASH_HSFSTS () {0x4;}' unless defined(&ICH_FLASH_HSFSTS);
    eval 'sub ICH_FLASH_HSFCTL () {0x6;}' unless defined(&ICH_FLASH_HSFCTL);
    eval 'sub ICH_FLASH_FADDR () {0x8;}' unless defined(&ICH_FLASH_FADDR);
    eval 'sub ICH_FLASH_FDATA0 () {0x10;}' unless defined(&ICH_FLASH_FDATA0);
    eval 'sub ICH_FLASH_FRACC () {0x50;}' unless defined(&ICH_FLASH_FRACC);
    eval 'sub ICH_FLASH_FREG0 () {0x54;}' unless defined(&ICH_FLASH_FREG0);
    eval 'sub ICH_FLASH_FREG1 () {0x58;}' unless defined(&ICH_FLASH_FREG1);
    eval 'sub ICH_FLASH_FREG2 () {0x5c;}' unless defined(&ICH_FLASH_FREG2);
    eval 'sub ICH_FLASH_FREG3 () {0x60;}' unless defined(&ICH_FLASH_FREG3);
    eval 'sub ICH_FLASH_FPR0 () {0x74;}' unless defined(&ICH_FLASH_FPR0);
    eval 'sub ICH_FLASH_FPR1 () {0x78;}' unless defined(&ICH_FLASH_FPR1);
    eval 'sub ICH_FLASH_SSFSTS () {0x90;}' unless defined(&ICH_FLASH_SSFSTS);
    eval 'sub ICH_FLASH_SSFCTL () {0x92;}' unless defined(&ICH_FLASH_SSFCTL);
    eval 'sub ICH_FLASH_PREOP () {0x94;}' unless defined(&ICH_FLASH_PREOP);
    eval 'sub ICH_FLASH_OPTYPE () {0x96;}' unless defined(&ICH_FLASH_OPTYPE);
    eval 'sub ICH_FLASH_OPMENU () {0x98;}' unless defined(&ICH_FLASH_OPMENU);
    eval 'sub ICH_FLASH_REG_MAPSIZE () {0xa0;}' unless defined(&ICH_FLASH_REG_MAPSIZE);
    eval 'sub ICH_FLASH_SECTOR_SIZE () {4096;}' unless defined(&ICH_FLASH_SECTOR_SIZE);
    eval 'sub ICH_GFPREG_BASE_MASK () {0x1fff;}' unless defined(&ICH_GFPREG_BASE_MASK);
    eval 'sub ICH_FLASH_LINEAR_ADDR_MASK () {0xffffff;}' unless defined(&ICH_FLASH_LINEAR_ADDR_MASK);
    eval 'sub PHY_PREAMBLE () {0xffffffff;}' unless defined(&PHY_PREAMBLE);
    eval 'sub PHY_SOF () {0x1;}' unless defined(&PHY_SOF);
    eval 'sub PHY_OP_READ () {0x2;}' unless defined(&PHY_OP_READ);
    eval 'sub PHY_OP_WRITE () {0x1;}' unless defined(&PHY_OP_WRITE);
    eval 'sub PHY_TURNAROUND () {0x2;}' unless defined(&PHY_TURNAROUND);
    eval 'sub PHY_PREAMBLE_SIZE () {32;}' unless defined(&PHY_PREAMBLE_SIZE);
    eval 'sub MII_CR_SPEED_1000 () {0x40;}' unless defined(&MII_CR_SPEED_1000);
    eval 'sub MII_CR_SPEED_100 () {0x2000;}' unless defined(&MII_CR_SPEED_100);
    eval 'sub MII_CR_SPEED_10 () {0x;}' unless defined(&MII_CR_SPEED_10);
    eval 'sub E1000_PHY_ADDRESS () {0x1;}' unless defined(&E1000_PHY_ADDRESS);
    eval 'sub PHY_AUTO_NEG_TIME () {45;}' unless defined(&PHY_AUTO_NEG_TIME);
    eval 'sub PHY_FORCE_TIME () {20;}' unless defined(&PHY_FORCE_TIME);
    eval 'sub PHY_REVISION_MASK () {0xfffffff0;}' unless defined(&PHY_REVISION_MASK);
    eval 'sub DEVICE_SPEED_MASK () {0x300;}' unless defined(&DEVICE_SPEED_MASK);
    eval 'sub REG4_SPEED_MASK () {0x1e0;}' unless defined(&REG4_SPEED_MASK);
    eval 'sub REG9_SPEED_MASK () {0x300;}' unless defined(&REG9_SPEED_MASK);
    eval 'sub ADVERTISE_10_HALF () {0x1;}' unless defined(&ADVERTISE_10_HALF);
    eval 'sub ADVERTISE_10_FULL () {0x2;}' unless defined(&ADVERTISE_10_FULL);
    eval 'sub ADVERTISE_100_HALF () {0x4;}' unless defined(&ADVERTISE_100_HALF);
    eval 'sub ADVERTISE_100_FULL () {0x8;}' unless defined(&ADVERTISE_100_FULL);
    eval 'sub ADVERTISE_1000_HALF () {0x10;}' unless defined(&ADVERTISE_1000_HALF);
    eval 'sub ADVERTISE_1000_FULL () {0x20;}' unless defined(&ADVERTISE_1000_FULL);
    eval 'sub AUTONEG_ADVERTISE_SPEED_DEFAULT () {0x2f;}' unless defined(&AUTONEG_ADVERTISE_SPEED_DEFAULT);
    eval 'sub AUTONEG_ADVERTISE_10_100_ALL () {0xf;}' unless defined(&AUTONEG_ADVERTISE_10_100_ALL);
    eval 'sub AUTONEG_ADVERTISE_10_ALL () {0x3;}' unless defined(&AUTONEG_ADVERTISE_10_ALL);
}
1;
