require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_DEV_MII_SQPHYREG_H_)) {
    eval 'sub _DEV_MII_SQPHYREG_H_ () {1;}' unless defined(&_DEV_MII_SQPHYREG_H_);
    eval 'sub MII_SQPHY_CONFIG1 () {0x10;}' unless defined(&MII_SQPHY_CONFIG1);
    eval 'sub CONFIG1_LNK_DIS () {0x8000;}' unless defined(&CONFIG1_LNK_DIS);
    eval 'sub CONFIG1_XMT_DIS () {0x4000;}' unless defined(&CONFIG1_XMT_DIS);
    eval 'sub CONFIG1_XMT_PDN () {0x2000;}' unless defined(&CONFIG1_XMT_PDN);
    eval 'sub CONFIG1_TXEN_CRS () {0x1000;}' unless defined(&CONFIG1_TXEN_CRS);
    eval 'sub CONFIG1_BYP_ENC () {0x800;}' unless defined(&CONFIG1_BYP_ENC);
    eval 'sub CONFIG1_BYP_SCR () {0x400;}' unless defined(&CONFIG1_BYP_SCR);
    eval 'sub CONFIG1_UNSCR_DIS () {0x200;}' unless defined(&CONFIG1_UNSCR_DIS);
    eval 'sub CONFIG1_EQLZR () {0x100;}' unless defined(&CONFIG1_EQLZR);
    eval 'sub CONFIG1_CABLE () {0x80;}' unless defined(&CONFIG1_CABLE);
    eval 'sub CONFIG1_RLVL0 () {0x40;}' unless defined(&CONFIG1_RLVL0);
    eval 'sub CONFIG1_TLVL3 () {0x20;}' unless defined(&CONFIG1_TLVL3);
    eval 'sub CONFIG1_TLVL2 () {0x10;}' unless defined(&CONFIG1_TLVL2);
    eval 'sub CONFIG1_TLVL1 () {0x8;}' unless defined(&CONFIG1_TLVL1);
    eval 'sub CONFIG1_TLVL0 () {0x4;}' unless defined(&CONFIG1_TLVL0);
    eval 'sub CONFIG1_TRF1 () {0x2;}' unless defined(&CONFIG1_TRF1);
    eval 'sub CONFIG1_TRF0 () {0x1;}' unless defined(&CONFIG1_TRF0);
    eval 'sub MII_SQPHY_CONFIG2 () {0x11;}' unless defined(&MII_SQPHY_CONFIG2);
    eval 'sub CONFIG2_PLED3_1 () {0x8000;}' unless defined(&CONFIG2_PLED3_1);
    eval 'sub CONFIG2_PLED3_0 () {0x4000;}' unless defined(&CONFIG2_PLED3_0);
    eval 'sub CONFIG2_PLED2_1 () {0x2000;}' unless defined(&CONFIG2_PLED2_1);
    eval 'sub CONFIG2_PLED2_0 () {0x1000;}' unless defined(&CONFIG2_PLED2_0);
    eval 'sub CONFIG2_PLED1_1 () {0x800;}' unless defined(&CONFIG2_PLED1_1);
    eval 'sub CONFIG2_PLED1_0 () {0x400;}' unless defined(&CONFIG2_PLED1_0);
    eval 'sub CONFIG2_PLED0_1 () {0x200;}' unless defined(&CONFIG2_PLED0_1);
    eval 'sub CONFIG2_PLED0_0 () {0x100;}' unless defined(&CONFIG2_PLED0_0);
    eval 'sub CONFIG2_LED_DEF1 () {0x80;}' unless defined(&CONFIG2_LED_DEF1);
    eval 'sub CONFIG2_LED_DEF0 () {0x40;}' unless defined(&CONFIG2_LED_DEF0);
    eval 'sub CONFIG2_APOL_DIS () {0x20;}' unless defined(&CONFIG2_APOL_DIS);
    eval 'sub CONFIG2_JAB_DIS () {0x10;}' unless defined(&CONFIG2_JAB_DIS);
    eval 'sub CONFIG2_MREG () {0x8;}' unless defined(&CONFIG2_MREG);
    eval 'sub CONFIG2_INT_MDIO () {0x4;}' unless defined(&CONFIG2_INT_MDIO);
    eval 'sub CONFIG2_RJ_CFG () {0x2;}' unless defined(&CONFIG2_RJ_CFG);
    eval 'sub MII_SQPHY_STATUS () {0x12;}' unless defined(&MII_SQPHY_STATUS);
    eval 'sub STATUS_INT () {0x8000;}' unless defined(&STATUS_INT);
    eval 'sub STATUS_LNK_FAIL () {0x4000;}' unless defined(&STATUS_LNK_FAIL);
    eval 'sub STATUS_LOSS_SYNC () {0x2000;}' unless defined(&STATUS_LOSS_SYNC);
    eval 'sub STATUS_CWRD () {0x1000;}' unless defined(&STATUS_CWRD);
    eval 'sub STATUS_SSD () {0x800;}' unless defined(&STATUS_SSD);
    eval 'sub STATUS_ESD () {0x400;}' unless defined(&STATUS_ESD);
    eval 'sub STATUS_RPOL () {0x200;}' unless defined(&STATUS_RPOL);
    eval 'sub STATUS_JAB () {0x100;}' unless defined(&STATUS_JAB);
    eval 'sub STATUS_SPD_DET () {0x80;}' unless defined(&STATUS_SPD_DET);
    eval 'sub STATUS_DPLX_DET () {0x40;}' unless defined(&STATUS_DPLX_DET);
    eval 'sub MII_SQPHY_MASK () {0x13;}' unless defined(&MII_SQPHY_MASK);
    eval 'sub MASK_INT () {0x8000;}' unless defined(&MASK_INT);
    eval 'sub MASK_LNK_FAIL () {0x4000;}' unless defined(&MASK_LNK_FAIL);
    eval 'sub MASK_LOSS_SYNC () {0x2000;}' unless defined(&MASK_LOSS_SYNC);
    eval 'sub MASK_CWRD () {0x1000;}' unless defined(&MASK_CWRD);
    eval 'sub MASK_SSD () {0x800;}' unless defined(&MASK_SSD);
    eval 'sub MASK_ESD () {0x400;}' unless defined(&MASK_ESD);
    eval 'sub MASK_RPOL () {0x200;}' unless defined(&MASK_RPOL);
    eval 'sub MASK_JAB () {0x100;}' unless defined(&MASK_JAB);
    eval 'sub MASK_SPD_DET () {0x80;}' unless defined(&MASK_SPD_DET);
    eval 'sub MASK_DPLX_DET () {0x40;}' unless defined(&MASK_DPLX_DET);
    eval 'sub MASK_ANEG_STS1 () {0x20;}' unless defined(&MASK_ANEG_STS1);
    eval 'sub MASK_ANEG_STS0 () {0x10;}' unless defined(&MASK_ANEG_STS0);
    eval 'sub MII_SQPHY_RESERVED () {0x14;}' unless defined(&MII_SQPHY_RESERVED);
}
1;
