require '_h2ph_pre.ph';

no warnings qw(redefine misc);

unless(defined(&__MGA_DRM_H__)) {
    eval 'sub __MGA_DRM_H__ () {1;}' unless defined(&__MGA_DRM_H__);
    unless(defined(&__MGA_SAREA_DEFINES__)) {
	eval 'sub __MGA_SAREA_DEFINES__ () {1;}' unless defined(&__MGA_SAREA_DEFINES__);
	eval 'sub MGA_F () {0x1;}' unless defined(&MGA_F);
	eval 'sub MGA_A () {0x2;}' unless defined(&MGA_A);
	eval 'sub MGA_S () {0x4;}' unless defined(&MGA_S);
	eval 'sub MGA_T2 () {0x8;}' unless defined(&MGA_T2);
	eval 'sub MGA_WARP_TGZ () {0;}' unless defined(&MGA_WARP_TGZ);
	eval 'sub MGA_WARP_TGZF () {( &MGA_F);}' unless defined(&MGA_WARP_TGZF);
	eval 'sub MGA_WARP_TGZA () {( &MGA_A);}' unless defined(&MGA_WARP_TGZA);
	eval 'sub MGA_WARP_TGZAF () {( &MGA_F| &MGA_A);}' unless defined(&MGA_WARP_TGZAF);
	eval 'sub MGA_WARP_TGZS () {( &MGA_S);}' unless defined(&MGA_WARP_TGZS);
	eval 'sub MGA_WARP_TGZSF () {( &MGA_S| &MGA_F);}' unless defined(&MGA_WARP_TGZSF);
	eval 'sub MGA_WARP_TGZSA () {( &MGA_S| &MGA_A);}' unless defined(&MGA_WARP_TGZSA);
	eval 'sub MGA_WARP_TGZSAF () {( &MGA_S| &MGA_F| &MGA_A);}' unless defined(&MGA_WARP_TGZSAF);
	eval 'sub MGA_WARP_T2GZ () {( &MGA_T2);}' unless defined(&MGA_WARP_T2GZ);
	eval 'sub MGA_WARP_T2GZF () {( &MGA_T2| &MGA_F);}' unless defined(&MGA_WARP_T2GZF);
	eval 'sub MGA_WARP_T2GZA () {( &MGA_T2| &MGA_A);}' unless defined(&MGA_WARP_T2GZA);
	eval 'sub MGA_WARP_T2GZAF () {( &MGA_T2| &MGA_A| &MGA_F);}' unless defined(&MGA_WARP_T2GZAF);
	eval 'sub MGA_WARP_T2GZS () {( &MGA_T2| &MGA_S);}' unless defined(&MGA_WARP_T2GZS);
	eval 'sub MGA_WARP_T2GZSF () {( &MGA_T2| &MGA_S| &MGA_F);}' unless defined(&MGA_WARP_T2GZSF);
	eval 'sub MGA_WARP_T2GZSA () {( &MGA_T2| &MGA_S| &MGA_A);}' unless defined(&MGA_WARP_T2GZSA);
	eval 'sub MGA_WARP_T2GZSAF () {( &MGA_T2| &MGA_S| &MGA_F| &MGA_A);}' unless defined(&MGA_WARP_T2GZSAF);
	eval 'sub MGA_MAX_G200_PIPES () {8;}' unless defined(&MGA_MAX_G200_PIPES);
	eval 'sub MGA_MAX_G400_PIPES () {16;}' unless defined(&MGA_MAX_G400_PIPES);
	eval 'sub MGA_MAX_WARP_PIPES () { &MGA_MAX_G400_PIPES;}' unless defined(&MGA_MAX_WARP_PIPES);
	eval 'sub MGA_WARP_UCODE_SIZE () {32768;}' unless defined(&MGA_WARP_UCODE_SIZE);
	eval 'sub MGA_CARD_TYPE_G200 () {1;}' unless defined(&MGA_CARD_TYPE_G200);
	eval 'sub MGA_CARD_TYPE_G400 () {2;}' unless defined(&MGA_CARD_TYPE_G400);
	eval 'sub MGA_CARD_TYPE_G450 () {3;}' unless defined(&MGA_CARD_TYPE_G450);
	eval 'sub MGA_CARD_TYPE_G550 () {4;}' unless defined(&MGA_CARD_TYPE_G550);
	eval 'sub MGA_FRONT () {0x1;}' unless defined(&MGA_FRONT);
	eval 'sub MGA_BACK () {0x2;}' unless defined(&MGA_BACK);
	eval 'sub MGA_DEPTH () {0x4;}' unless defined(&MGA_DEPTH);
	eval 'sub MGA_UPLOAD_CONTEXT () {0x1;}' unless defined(&MGA_UPLOAD_CONTEXT);
	eval 'sub MGA_UPLOAD_TEX0 () {0x2;}' unless defined(&MGA_UPLOAD_TEX0);
	eval 'sub MGA_UPLOAD_TEX1 () {0x4;}' unless defined(&MGA_UPLOAD_TEX1);
	eval 'sub MGA_UPLOAD_PIPE () {0x8;}' unless defined(&MGA_UPLOAD_PIPE);
	eval 'sub MGA_UPLOAD_TEX0IMAGE () {0x10;}' unless defined(&MGA_UPLOAD_TEX0IMAGE);
	eval 'sub MGA_UPLOAD_TEX1IMAGE () {0x20;}' unless defined(&MGA_UPLOAD_TEX1IMAGE);
	eval 'sub MGA_UPLOAD_2D () {0x40;}' unless defined(&MGA_UPLOAD_2D);
	eval 'sub MGA_WAIT_AGE () {0x80;}' unless defined(&MGA_WAIT_AGE);
	eval 'sub MGA_UPLOAD_CLIPRECTS () {0x100;}' unless defined(&MGA_UPLOAD_CLIPRECTS);
	if(0) {
	    eval 'sub MGA_DMA_FLUSH () {0x200;}' unless defined(&MGA_DMA_FLUSH);
	}
	eval 'sub MGA_BUFFER_SIZE () {(1<< 16);}' unless defined(&MGA_BUFFER_SIZE);
	eval 'sub MGA_NUM_BUFFERS () {128;}' unless defined(&MGA_NUM_BUFFERS);
	eval 'sub MGA_NR_SAREA_CLIPRECTS () {8;}' unless defined(&MGA_NR_SAREA_CLIPRECTS);
	eval 'sub MGA_CARD_HEAP () {0;}' unless defined(&MGA_CARD_HEAP);
	eval 'sub MGA_AGP_HEAP () {1;}' unless defined(&MGA_AGP_HEAP);
	eval 'sub MGA_NR_TEX_HEAPS () {2;}' unless defined(&MGA_NR_TEX_HEAPS);
	eval 'sub MGA_NR_TEX_REGIONS () {16;}' unless defined(&MGA_NR_TEX_REGIONS);
	eval 'sub MGA_LOG_MIN_TEX_REGION_SIZE () {16;}' unless defined(&MGA_LOG_MIN_TEX_REGION_SIZE);
	eval 'sub DRM_MGA_IDLE_RETRY () {2048;}' unless defined(&DRM_MGA_IDLE_RETRY);
    }
    eval 'sub DRM_MGA_INIT () {0x;}' unless defined(&DRM_MGA_INIT);
    eval 'sub DRM_MGA_FLUSH () {0x1;}' unless defined(&DRM_MGA_FLUSH);
    eval 'sub DRM_MGA_RESET () {0x2;}' unless defined(&DRM_MGA_RESET);
    eval 'sub DRM_MGA_SWAP () {0x3;}' unless defined(&DRM_MGA_SWAP);
    eval 'sub DRM_MGA_CLEAR () {0x4;}' unless defined(&DRM_MGA_CLEAR);
    eval 'sub DRM_MGA_VERTEX () {0x5;}' unless defined(&DRM_MGA_VERTEX);
    eval 'sub DRM_MGA_INDICES () {0x6;}' unless defined(&DRM_MGA_INDICES);
    eval 'sub DRM_MGA_ILOAD () {0x7;}' unless defined(&DRM_MGA_ILOAD);
    eval 'sub DRM_MGA_BLIT () {0x8;}' unless defined(&DRM_MGA_BLIT);
    eval 'sub DRM_MGA_GETPARAM () {0x9;}' unless defined(&DRM_MGA_GETPARAM);
    eval 'sub DRM_MGA_SET_FENCE () {0xa;}' unless defined(&DRM_MGA_SET_FENCE);
    eval 'sub DRM_MGA_WAIT_FENCE () {0xb;}' unless defined(&DRM_MGA_WAIT_FENCE);
    eval 'sub DRM_MGA_DMA_BOOTSTRAP () {0xc;}' unless defined(&DRM_MGA_DMA_BOOTSTRAP);
    eval 'sub DRM_IOCTL_MGA_INIT () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_MGA_INIT,  &drm_mga_init_t);}' unless defined(&DRM_IOCTL_MGA_INIT);
    eval 'sub DRM_IOCTL_MGA_FLUSH () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_MGA_FLUSH,  &drm_lock_t);}' unless defined(&DRM_IOCTL_MGA_FLUSH);
    eval 'sub DRM_IOCTL_MGA_RESET () { &DRM_IO(  &DRM_COMMAND_BASE +  &DRM_MGA_RESET);}' unless defined(&DRM_IOCTL_MGA_RESET);
    eval 'sub DRM_IOCTL_MGA_SWAP () { &DRM_IO(  &DRM_COMMAND_BASE +  &DRM_MGA_SWAP);}' unless defined(&DRM_IOCTL_MGA_SWAP);
    eval 'sub DRM_IOCTL_MGA_CLEAR () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_MGA_CLEAR,  &drm_mga_clear_t);}' unless defined(&DRM_IOCTL_MGA_CLEAR);
    eval 'sub DRM_IOCTL_MGA_VERTEX () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_MGA_VERTEX,  &drm_mga_vertex_t);}' unless defined(&DRM_IOCTL_MGA_VERTEX);
    eval 'sub DRM_IOCTL_MGA_INDICES () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_MGA_INDICES,  &drm_mga_indices_t);}' unless defined(&DRM_IOCTL_MGA_INDICES);
    eval 'sub DRM_IOCTL_MGA_ILOAD () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_MGA_ILOAD,  &drm_mga_iload_t);}' unless defined(&DRM_IOCTL_MGA_ILOAD);
    eval 'sub DRM_IOCTL_MGA_BLIT () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_MGA_BLIT,  &drm_mga_blit_t);}' unless defined(&DRM_IOCTL_MGA_BLIT);
    eval 'sub DRM_IOCTL_MGA_GETPARAM () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_MGA_GETPARAM,  &drm_mga_getparam_t);}' unless defined(&DRM_IOCTL_MGA_GETPARAM);
    eval 'sub DRM_IOCTL_MGA_SET_FENCE () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_MGA_SET_FENCE,  &uint32_t);}' unless defined(&DRM_IOCTL_MGA_SET_FENCE);
    eval 'sub DRM_IOCTL_MGA_WAIT_FENCE () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_MGA_WAIT_FENCE,  &uint32_t);}' unless defined(&DRM_IOCTL_MGA_WAIT_FENCE);
    eval 'sub DRM_IOCTL_MGA_DMA_BOOTSTRAP () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_MGA_DMA_BOOTSTRAP,  &drm_mga_dma_bootstrap_t);}' unless defined(&DRM_IOCTL_MGA_DMA_BOOTSTRAP);
    eval("sub MGA_INIT_DMA () { 0x01; }") unless defined(&MGA_INIT_DMA);
    eval("sub MGA_CLEANUP_DMA () { 0x02; }") unless defined(&MGA_CLEANUP_DMA);
    eval 'sub MGA_PARAM_IRQ_NR () {1;}' unless defined(&MGA_PARAM_IRQ_NR);
    eval 'sub MGA_PARAM_CARD_TYPE () {2;}' unless defined(&MGA_PARAM_CARD_TYPE);
}
1;
