require '_h2ph_pre.ph';

no warnings qw(redefine misc);

unless(defined(&_SPARC_BUS_H_)) {
    eval 'sub _SPARC_BUS_H_ () {1;}' unless defined(&_SPARC_BUS_H_);
    require 'machine/ctlreg.ph';
    eval 'sub BSDB_ACCESS () {0x1;}' unless defined(&BSDB_ACCESS);
    eval 'sub BSDB_MAP () {0x2;}' unless defined(&BSDB_MAP);
    eval 'sub BSDB_ASSERT () {0x4;}' unless defined(&BSDB_ASSERT);
    eval 'sub BSDB_MAPDETAIL () {0x8;}' unless defined(&BSDB_MAPDETAIL);
    eval 'sub BSDB_ALL_ACCESS () {0x10;}' unless defined(&BSDB_ALL_ACCESS);
    eval 'sub BSHDB_ACCESS () {0x1;}' unless defined(&BSHDB_ACCESS);
    eval 'sub BSHDB_NO_ACCESS () {0x2;}' unless defined(&BSHDB_NO_ACCESS);
    if(defined( &BUS_SPACE_DEBUG)) {
	unless(defined(&__SYSTM_H__)) {
	    require 'sys/systm.ph';
	}
	eval 'sub BUS_SPACE_PRINTF {
	    my($l, $s) = @_;
    	    eval q( &do {  &if( &bus_space_debug & ($l))  &printf $s; }  &while(0));
	}' unless defined(&BUS_SPACE_PRINTF);
	eval 'sub BUS_SPACE_TRACE {
	    my($t, $h, $s) = @_;
    	    eval q( &do {  &if ( ((( &bus_space_debug &  &BSDB_ALL_ACCESS) != 0)  && ((($h). &bh_flags &  &BSHDB_NO_ACCESS) == 0)) || ((( &bus_space_debug &  &BSDB_ACCESS) != 0)  && ((($h). &bh_flags &  &BSHDB_ACCESS) != 0)))  &printf $s; }  &while(0));
	}' unless defined(&BUS_SPACE_TRACE);
	eval 'sub BUS_SPACE_SET_FLAGS {
	    my($t, $h, $f) = @_;
    	    eval q((($h). &bh_flags |= ($f)));
	}' unless defined(&BUS_SPACE_SET_FLAGS);
	eval 'sub BUS_SPACE_CLEAR_FLAGS {
	    my($t, $h, $f) = @_;
    	    eval q((($h). &bh_flags &= ~($f)));
	}' unless defined(&BUS_SPACE_CLEAR_FLAGS);
	eval 'sub BUS_SPACE_FLAG_DECL {
	    my($s) = @_;
    	    eval q(\'int\' $s);
	}' unless defined(&BUS_SPACE_FLAG_DECL);
	eval 'sub BUS_SPACE_SAVE_FLAGS {
	    my($t, $h, $s) = @_;
    	    eval q(($s = ($h). &bh_flags));
	}' unless defined(&BUS_SPACE_SAVE_FLAGS);
	eval 'sub BUS_SPACE_RESTORE_FLAGS {
	    my($t, $h, $s) = @_;
    	    eval q(($s = ($h). &bh_flags));
	}' unless defined(&BUS_SPACE_RESTORE_FLAGS);
	eval 'sub BUS_SPACE_ASSERT {
	    my($t, $h, $o, $n) = @_;
    	    eval q( &do {  &if ( &bus_space_debug &  &BSDB_ASSERT)  &bus_space_assert($t, ($h), $o, $n); }  &while(0));
	}' unless defined(&BUS_SPACE_ASSERT);
    } else {
	eval 'sub BUS_SPACE_PRINTF {
	    my($l, $s) = @_;
    	    eval q();
	}' unless defined(&BUS_SPACE_PRINTF);
	eval 'sub BUS_SPACE_TRACE {
	    my($t, $h, $s) = @_;
    	    eval q();
	}' unless defined(&BUS_SPACE_TRACE);
	eval 'sub BUS_SPACE_SET_FLAGS {
	    my($t, $h, $f) = @_;
    	    eval q();
	}' unless defined(&BUS_SPACE_SET_FLAGS);
	eval 'sub BUS_SPACE_CLEAR_FLAGS {
	    my($t, $h, $f) = @_;
    	    eval q();
	}' unless defined(&BUS_SPACE_CLEAR_FLAGS);
	eval 'sub BUS_SPACE_FLAG_DECL {
	    my($s) = @_;
    	    eval q();
	}' unless defined(&BUS_SPACE_FLAG_DECL);
	eval 'sub BUS_SPACE_SAVE_FLAGS {
	    my($t, $h, $s) = @_;
    	    eval q();
	}' unless defined(&BUS_SPACE_SAVE_FLAGS);
	eval 'sub BUS_SPACE_RESTORE_FLAGS {
	    my($t, $h, $s) = @_;
    	    eval q();
	}' unless defined(&BUS_SPACE_RESTORE_FLAGS);
	eval 'sub BUS_SPACE_ASSERT {
	    my($t, $h, $o, $n) = @_;
    	    eval q();
	}' unless defined(&BUS_SPACE_ASSERT);
    }
    eval("sub UPA_BUS_SPACE () { 0; }") unless defined(&UPA_BUS_SPACE);
    eval("sub SBUS_BUS_SPACE () { 1; }") unless defined(&SBUS_BUS_SPACE);
    eval("sub PCI_CONFIG_BUS_SPACE () { 2; }") unless defined(&PCI_CONFIG_BUS_SPACE);
    eval("sub PCI_IO_BUS_SPACE () { 3; }") unless defined(&PCI_IO_BUS_SPACE);
    eval("sub PCI_MEMORY_BUS_SPACE () { 4; }") unless defined(&PCI_MEMORY_BUS_SPACE);
    eval("sub LAST_BUS_SPACE () { 5; }") unless defined(&LAST_BUS_SPACE);
    eval 'sub SPARC_BUS_SPACE () { &UPA_BUS_SPACE;}' unless defined(&SPARC_BUS_SPACE);
    if(defined(&BUS_SPACE_DEBUG)) {
    }
    eval 'sub BUS_ADDR_IOSPACE {
        my($x) = @_;
	    eval q((($x)>>32));
    }' unless defined(&BUS_ADDR_IOSPACE);
    eval 'sub BUS_ADDR_PADDR {
        my($x) = @_;
	    eval q((($x)&0xffffffff));
    }' unless defined(&BUS_ADDR_PADDR);
    eval 'sub BUS_ADDR {
        my($io, $pa) = @_;
	    eval q((((( &bus_addr_t)$io)<<32)|($pa)));
    }' unless defined(&BUS_ADDR);
    if(defined(&BUS_SPACE_DEBUG)) {
    }
    eval 'sub _BS_PRECALL {
        my($t,$f) = @_;
	    eval q( &while ( ($t->{f}) ==  &NULL) $t =  ($t->{parent}););
    }' unless defined(&_BS_PRECALL);
    eval 'sub _BS_POSTCALL () {1;}' unless defined(&_BS_POSTCALL);
    eval 'sub _BS_CALL {
        my($t,$f) = @_;
	    eval q((*($t)->$f));
    }' unless defined(&_BS_CALL);
    require 'sparc64/sparc64/busop.ph';
    eval 'sub BUS_SPACE_MAP_CACHEABLE () {0x1;}' unless defined(&BUS_SPACE_MAP_CACHEABLE);
    eval 'sub BUS_SPACE_MAP_LINEAR () {0x2;}' unless defined(&BUS_SPACE_MAP_LINEAR);
    eval 'sub BUS_SPACE_MAP_READONLY () {0x4;}' unless defined(&BUS_SPACE_MAP_READONLY);
    eval 'sub BUS_SPACE_MAP_PREFETCHABLE () {0x8;}' unless defined(&BUS_SPACE_MAP_PREFETCHABLE);
    eval 'sub BUS_SPACE_MAP_PROMADDRESS () {0x10;}' unless defined(&BUS_SPACE_MAP_PROMADDRESS);
    eval 'sub BUS_SPACE_MAP_BUS1 () {0x100;}' unless defined(&BUS_SPACE_MAP_BUS1);
    eval 'sub BUS_SPACE_MAP_BUS2 () {0x200;}' unless defined(&BUS_SPACE_MAP_BUS2);
    eval 'sub BUS_SPACE_MAP_BUS3 () {0x400;}' unless defined(&BUS_SPACE_MAP_BUS3);
    eval 'sub BUS_SPACE_MAP_BUS4 () {0x800;}' unless defined(&BUS_SPACE_MAP_BUS4);
    eval 'sub BUS_INTR_ESTABLISH_FASTTRAP () {1;}' unless defined(&BUS_INTR_ESTABLISH_FASTTRAP);
    eval 'sub BUS_INTR_ESTABLISH_SOFTINTR () {2;}' unless defined(&BUS_INTR_ESTABLISH_SOFTINTR);
    eval 'sub BUS_SPACE_BARRIER_READ () {0x1;}' unless defined(&BUS_SPACE_BARRIER_READ);
    eval 'sub BUS_SPACE_BARRIER_WRITE () {0x2;}' unless defined(&BUS_SPACE_BARRIER_WRITE);
    eval 'sub BUS_DMA_WAITOK () {0x;}' unless defined(&BUS_DMA_WAITOK);
    eval 'sub BUS_DMA_NOWAIT () {0x1;}' unless defined(&BUS_DMA_NOWAIT);
    eval 'sub BUS_DMA_ALLOCNOW () {0x2;}' unless defined(&BUS_DMA_ALLOCNOW);
    eval 'sub BUS_DMA_COHERENT () {0x4;}' unless defined(&BUS_DMA_COHERENT);
    eval 'sub BUS_DMA_NOWRITE () {0x8;}' unless defined(&BUS_DMA_NOWRITE);
    eval 'sub BUS_DMA_BUS1 () {0x10;}' unless defined(&BUS_DMA_BUS1);
    eval 'sub BUS_DMA_BUS2 () {0x20;}' unless defined(&BUS_DMA_BUS2);
    eval 'sub BUS_DMA_BUS3 () {0x40;}' unless defined(&BUS_DMA_BUS3);
    eval 'sub BUS_DMA_BUS4 () {0x80;}' unless defined(&BUS_DMA_BUS4);
    eval 'sub BUS_DMA_STREAMING () {0x100;}' unless defined(&BUS_DMA_STREAMING);
    eval 'sub BUS_DMA_READ () {0x200;}' unless defined(&BUS_DMA_READ);
    eval 'sub BUS_DMA_WRITE () {0x400;}' unless defined(&BUS_DMA_WRITE);
    eval 'sub BUS_DMA_ZERO () {0x800;}' unless defined(&BUS_DMA_ZERO);
    eval 'sub BUS_DMA_NOCACHE () { &BUS_DMA_BUS1;}' unless defined(&BUS_DMA_NOCACHE);
    eval 'sub BUS_DMA_DVMA () { &BUS_DMA_BUS2;}' unless defined(&BUS_DMA_DVMA);
    eval 'sub BUS_DMA_24BIT () { &BUS_DMA_BUS3;}' unless defined(&BUS_DMA_24BIT);
    eval 'sub BUS_DMA_RAW () { &BUS_DMA_STREAMING;}' unless defined(&BUS_DMA_RAW);
    eval 'sub BUS_DMASYNC_PREREAD () {0x1;}' unless defined(&BUS_DMASYNC_PREREAD);
    eval 'sub BUS_DMASYNC_POSTREAD () {0x2;}' unless defined(&BUS_DMASYNC_POSTREAD);
    eval 'sub BUS_DMASYNC_PREWRITE () {0x4;}' unless defined(&BUS_DMASYNC_PREWRITE);
    eval 'sub BUS_DMASYNC_POSTWRITE () {0x8;}' unless defined(&BUS_DMASYNC_POSTWRITE);
    eval 'sub _BD_PRECALL {
        my($t,$f) = @_;
	    eval q( &while ( ($t->{f}) ==  &NULL) { $t =  ($t->{_parent}); });
    }' unless defined(&_BD_PRECALL);
    eval 'sub _BD_CALL {
        my($t,$f) = @_;
	    eval q((*($t)->$f));
    }' unless defined(&_BD_CALL);
    eval 'sub _BD_POSTCALL () {1;}' unless defined(&_BD_POSTCALL);
    eval 'sub _DM_TYPE_LOAD () {0;}' unless defined(&_DM_TYPE_LOAD);
    eval 'sub _DM_TYPE_SEGS () {1;}' unless defined(&_DM_TYPE_SEGS);
    eval 'sub _DM_TYPE_UIO () {2;}' unless defined(&_DM_TYPE_UIO);
    eval 'sub _DM_TYPE_MBUF () {3;}' unless defined(&_DM_TYPE_MBUF);
}
1;
