<?xml version='1.0' encoding='UTF-8'?>
<module fritzingVersion="0.7.12b.02.13.6882" moduleId="AnalogDevices_ADP3300ARTZ" referenceFile="ADP3300.AnalogDevices_ADP3300ARTZ.fzp">
 <version>4</version>
 <date>Tue Feb 26 2013</date>
 <author>Analog Devices</author>
 <description/>
 <title>ADP3300 - High Accuracy 50mA Low Dropout Linear Regulator</title>
 <url>http://www.analog.com/ADP3300</url>
 <tags/>
 <properties>
  <property name="family">ADI-LDO</property>
  <property name="part number">ADP3300</property>
 </properties>
 <label>U</label>
 <views>
  <breadboardView>
   <layers image="breadboard/ADP3300.svg">
    <layer layerId="breadboard"/>
   </layers>
  </breadboardView>
  <schematicView>
   <layers image="schematic/ADP3300.svg">
    <layer layerId="schematic"/>
   </layers>
  </schematicView>
  <pcbView>
   <layers image="pcb/ADP3300.svg">
    <layer layerId="copper1"/>
    <layer layerId="silkscreen"/>
    <layer layerId="copper0"/>
   </layers>
  </pcbView>
  <iconView>
   <layers image="icon/ADP3300.svg">
    <layer layerId="icon"/>
   </layers>
  </iconView>
 </views>
 <connectors>
  <connector type="male" id="connector1" name="NC">
   <description>GND</description>
   <views>
    <breadboardView>
     <p svgId="connector1pin" layer="breadboard"/>
    </breadboardView>
    <schematicView>
     <p svgId="connector1pin" layer="schematic" terminalId="connector1terminal"/>
    </schematicView>
    <pcbView>
     <p svgId="connector1pad" layer="copper0"/>
     <p svgId="connector1pad" layer="copper1"/>
    </pcbView>
   </views>
  </connector>
  <connector type="male" id="connector2" name="-INA">
   <description>NR</description>
   <views>
    <breadboardView>
     <p svgId="connector2pin" layer="breadboard"/>
    </breadboardView>
    <schematicView>
     <p svgId="connector2pin" layer="schematic" terminalId="connector2terminal"/>
    </schematicView>
    <pcbView>
     <p svgId="connector2pad" layer="copper0"/>
     <p svgId="connector2pad" layer="copper1"/>
    </pcbView>
   </views>
  </connector>
  <connector type="male" id="connector3" name="+INA">
   <description>SDB</description>
   <views>
    <breadboardView>
     <p svgId="connector3pin" layer="breadboard"/>
    </breadboardView>
    <schematicView>
     <p svgId="connector3pin" layer="schematic" terminalId="connector3terminal"/>
    </schematicView>
    <pcbView>
     <p svgId="connector3pad" layer="copper0"/>
     <p svgId="connector3pad" layer="copper1"/>
    </pcbView>
   </views>
  </connector>
  <connector type="male" id="connector4" name="-V">
   <description>OUT</description>
   <views>
    <breadboardView>
     <p svgId="connector4pin" layer="breadboard"/>
    </breadboardView>
    <schematicView>
     <p svgId="connector4pin" layer="schematic" terminalId="connector4terminal"/>
    </schematicView>
    <pcbView>
     <p svgId="connector4pad" layer="copper0"/>
     <p svgId="connector4pad" layer="copper1"/>
    </pcbView>
   </views>
  </connector>
  <connector type="male" id="connector5" name="NC">
   <description>IN</description>
   <views>
    <breadboardView>
     <p svgId="connector5pin" layer="breadboard"/>
    </breadboardView>
    <schematicView>
     <p svgId="connector5pin" layer="schematic" terminalId="connector5terminal"/>
    </schematicView>
    <pcbView>
     <p svgId="connector5pad" layer="copper0"/>
     <p svgId="connector5pad" layer="copper1"/>
    </pcbView>
   </views>
  </connector>
  <connector type="male" id="connector6" name="OUTA">
   <description>ERRB</description>
   <views>
    <breadboardView>
     <p svgId="connector6pin" layer="breadboard"/>
    </breadboardView>
    <schematicView>
     <p svgId="connector6pin" layer="schematic" terminalId="connector6terminal"/>
    </schematicView>
    <pcbView>
     <p svgId="connector6pad" layer="copper0"/>
     <p svgId="connector6pad" layer="copper1"/>
    </pcbView>
   </views>
  </connector>
 </connectors>
 <buses/>
</module>
